NCP1351CDR2G;NCP1351DDR2G;NCP1351APG;NCP1351BPG;NCP1351CPG;中文规 ...

©Ă Semiconductor Components Industries, LLC, 2007 November, 2007 - Rev. 31Publication Order Number:
NCP1351/D
NCP1351
Variable Off Time PWM Controller济宁脉管炎医院
The NCP1351 is a current-mode controller targeting low power off-line flyback Switched Mode Power Supplies (SMPS) where cost is of utmost importance. Based on a fixed peak current technique (quasi-fixed T ON), the controller decreases its switching frequency as the load becomes lighter. As a result, a power supply using the NCP1351 naturally offers excellent no-load power consumption, while optimizing the efficiency in other loading conditions. When the frequency decreases, the peak current is gradually reduced down to approximately 30% of the maximum peak current to prevent transformer mechanical resonance. The risk of acoustic noise is thus greatly diminished while keeping good standby power performance. An externally adjustable timer permanently monitors the feedback activity and protects the supply in presence of a short-circuit or an overload. Once the timer elapses, NCP1351 stops switching and stays latched for version A, and tries to restart for version B.
Versions C and D include a dual overcurrent protection trip point, allowing the implementation of the controller in peak-power requirements applications such as printers and so on. When the fault is acknowledged, C version latches-off whereas D version auto-recovers.
The internal structure features an optimized arrangement which allows one of the lowest available startup current, a fundamental parameter when designing low standby power supplies.
The negative current sensing technique minimizes the impact of the switching noise on the controller operation and offers the user to select the maximum peak voltage across his current sense resistor. Its power dissipation can thus be application optimized.
Finally, the bulk input ripple ensures a natural frequency smearing which smooths the EMI signature.
Features
•ăQuasi-fixed T ON, Variable T OFF Current Mode Control
•ăExtremely Low Current Consumption at Startup
•ăPeak Current Compression Reduces Transformer Noise
•ăPrimary or Secondary Side Regulation
•ăDedicated Latch Input for OTP, OVP
•ăProgrammable Current Sense Resistor Peak V oltage
•ăNatural Frequency Dithering for Improved EMI Signature
•ăEasy External Over Power Protection (OPP)
•ăUndervoltage Lockout
•ăVery Low Standby Power via Off-time Expansion
•ăSOIC-8 Package
•Standard Overcurrent Protection, Latched or
Auto-Recovery, A & B Versions
海关总署公告2012年第15号
•Dual Trip Point Overcurrent Protection, Latched or Auto-Recovery, C & D Versions
•These are Pb-Free Devices Typical Applications
•Auxiliary Power Supply
•Printer, Game Stations, Low-Cost Adapters
•Off-line Battery Charger
SOIC-8
D SUFFIX
difCASE 751
MARKING DIAGRAMS
PIN CONNECTIONS
FB TIMER
Ct
CS
王从义中国美术学院
GND
LATCH
V CC
DRV
(Top View)
onsemi
1
痔血胶囊PDIP-8
P SUFFIX
CASE 626
NCP1351x
AWL
YYWWG
1
x= A, B, C, or D Options
A= Assembly Location
L, WL= Wafer Lot
Y, YY= Year
W, WW= Work Week
G or G= Pb-Free Package
(Note: Microdot may be in either location)
See detailed ordering and shipping information in the package
dimensions section on page 25 of this data sheet.
ORDERING INFORMATION
Figure 1. Typical Application Circuit
PIN FUNCTION DESCRIPTION
Pin N°Pin Name Function Pin Description 1FB Feedback Input Injecting Current in this Pin Reduces Frequency
2Ct Oscillator Frequency    A capacitor sets the maximum switching frequency at no feedback current 3CS Current Sense Input Senses the Primary Current
4GND––
5DRV Driver Output Driving Pulses to the Power MOSFET
6V CC Supply Input Supplies the controller up to 28 V
7Latch Latchoff Input    A positive voltage above V LATCH fully latches off the controller 8Timer Fault Timer Capacitor Sets the time duration before fault validation
OVERCURRENT PROTECTION ON NCP1351 VERSIONS:
NCP1351Auto-recovery Latched Dual level
A x
B x
C x x
D x x
INTERNAL CIRCUIT ARCHITECTURE
Figure 2. A Version (Latched Short-Circuit Protection)
FB
Ct
CS
GND
CC
FB
Ct
CC CS
GND
Figure 3. B Version (Auto-recovery Short-Circuit Protection)
成果形式FB
Ct
CC CS
GND
Figure 4. C Version (Latched Short-Circuit Protection)

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