AT83C23OK203-RATUM中文资料

Features Array•Host Interface
–USB (Compliant with USB 1.1 and 2.0, CCID Supported)
–Transmission Speed: USB: 12 MBit/sec
–Customer Specific USB-descriptors
–Serial
•Smart Card Interface
–Smart Card Interface Compliant with ISO 7816 and EMV 2000itg
–Support of T=0, T=1, TWI (S=8), 2-wire: SLE 4432/42 (S=10), 3-wire: SLE4418/28 (S=9), others on request
–High Performance Smart Card Interface
–Supports 5V, 3V and 1.8V Smart Cards
–Supply Current 60 mA to Power the Smart Card
–Smart Card Movement Detection with Auto Power-off
–Automatic Detection of Smart Card Type
–Short Circuit and Thermal Protection
–8-pin Handling (C4/C8 Supported)
•Compliance
– WHQL (Microsoft) Certified
– EMV 2000 (Europay, Mastercard, Visa) Certified
– USB 1.1 and 2.0
– USB CCID
– ISO 7816
– HBCI
•Other Features
–Fast and Easy Certification Process
–Supports LED Status Indicator (Green: ready; Red: busy)
–Secure Pin Entry (SPE)
•PC/SC Driver support
–Windows 98/ME®
–Windows 2000®
–Windows XP®
–Windows CE 3.0®/CE.NET (Depending on Hardware)
–Windows NT® 4.0 (On Request)
顽皮豆豆
–Linux®
–MacOS X®
•Operating Voltage
–3.0V - 5.5V
•Temperature
–-40°C to+85°C
•Packages
–32-pin VQFP or 32-pin QFN
AT83C23OK Description Smart Cards are increasingly being used for Payments, Home-Banking, Access Control,
Internet Security, PKItokens, Health Care, Loyalty, etc.
The CardMan Smart@Link chip set is a ready to use precertified smart card reader inter-
face, that can be implemented into USB hosts. It facilitates hardware integrators by
reducing time-to-market and offers a unique opportunity to quickly and easily include
smart card reader functionality in systems like PCs, Notebooks, Keyboards, Smart Card
based Dongles, Monitors, Mice, PDAs, Thin Clients, Biometric devices etc. The already
existing certifications and compliances guarantee a fast and easy certification process.
With its high performance Smart Card Interface CardMan Smart@Link supports smart-
card technology of the future.
The integration in any USB system can be easily done without any firmware or software
(driver) development, simply by embedding the CardMan Smart@Link design and
chipset into the target system. The USB CCID support makes this process the easiest
ever by connecting host and Smart Card Reader systems without the need of additional
drivers.
CardMan Smart@Link combines Atmel’s AT83C5123 microcontroller and Omnikey
firmware.
For detailed information on the Omnikey firmware, please refer to the Omnikey web site:
omnikey.aaitg.
In addition to the summary information contained in this document, please refer to the
AT83C5123 datasheet for complete product information. This document is available on
the Atmel web site www.atmel.
Pin Configurations
Figure 1.  VQFP32 Package Pinout
Figure 2.  QFN32 Package Pinout
C I O VQFP32
P3.1/TxD CCLK P5.0CC4DVCC CC8X T A L 1L I V C C
P 3.7/L E D 3C V C C
C V S S P3.6/LED2
CRST P1.2/CPRES
D -D +
A V C C A V S S
P L L F
P3.4/T0/LED1P3.0/RxD
2827261234567242322212019181211109131415VSS
8
16
17
P1.6
P3.5/T1/CRST1P 1.7/C C L K 1
V R E F
25
29303132X T A L 2R S T
P3.2/INT0/LED0/CIO1P3.3/INT1C I O QFN32
P3.1/TxD CCLK P5.0CC4DVCC CC8X T A L 1L I V C C
P 3.7/L E D 3C V C C
C V S S
P3.6/LED2
CRST P1.2/CPRES
D -D +
A V C C A V S S
P L L F
P3.4/T0/LED1P3.0/RxD
2827261234567242322212019181211109131415VSS
8
外墙外保温系统16
17
P1.6
P3.5/T1/CRST1P 1.7/C C L K 1
V R E F
25
29303132X T A L 2
R S T
P3.2/INT0/LED0/CIO1P3.3/INT1
AT83C23OK
Pin Description
Table 1.  Pin Description
Port
V Q F P 32
Q F N 32
Internal Power Supply
ESD
I/O
Reset Level
Alt
CIO
32
32
CVCC
6KV
I/O
Card interface-I/O pin
CVcc inactive at reset . ESD tested with 10µF on CVcc. An external pull-up of 4.7K Ω is recommended to support ICC’s with too high internal pull-ups.CC833CVCC 6KV I/O 0
Card interface-C8 pin
CVcc inactive at reset. ESD tested with 10µF on CVcc. CPRES
2
2
VCC
2KV
I/O
1
Card Presence signal
If P3.4 pin is connected to GND, the card inserted information generates a high level on CPRES pin.
Else, a low level on this pin indicates that a card is inserted.
CC4
5
5
CVCC
6KV
I/O
Card interface-C4 pin
CVcc inactive at reset. ESD tested with 10µF on CVcc. CCLK 66CVCC 6KV O 0
Card interface-CLK pin
CVcc inactive at reset. ESD tested with 10µF on CVcc. CRST 44CVCC 6KV O 0
Card interface-RST pin
CVcc inactive at reset. ESD tested with 10µF on CVcc. P1.62323VCC 2KV I/O 1
For Serial reader: Connect this to GND.For USB reader: Leave this pin unconnected.P1.73131VCC 2KV I/O 1
Leave this pin unonnected
P3.02222VCC 2KV I/O 1
For Serial reader: RxD: Connect this pin to the host TxD signal.For USB reader: Connect this pin to GND.
P3.12424VCC 2KV I/O 1
For Serial reader: TxD: Connect this pin to the host RxD signal.For USB reader: Leave this pin uncon
nected.
P3.22020VCC 2KV I/O 1
For Serial reader: INT0: Connect this pin to host RTS signal.For USB reader: Connect this pin to GND.P3.31919VCC 2KV I/O 1
For Serial reader: Leave this pin unconnected.For USB reader: Connect this pin to GND.P3.4
18
18
VCC
2KV
I/O
1
Eject Signal
To support the eject of the smart card under control of the application. Please refer to Design-In Manual for additionnal information.
This pin indicates also the polarity of Card Insertion Signal.
P3.5
21
21
VCC
2KV
I/O
1
For Serial reader: Connect this to GND.For USB reader: Leave this pin unconnected.SCL 1717VCC 2KV I/O 1
TWI Expansion  (I²C compliant)
May be used for memory extension, parallel port expanders and more.
Please refer to the Design-IN Manual.
SDA
13
13
VCC
2KV
I/O
1
RST
16
16
VCC
I/0
Reset Input
The Port pins are driven to their reset conditions when a voltage lower than V IL  is applied, whether or not the oscillator is running.
This pin has an internal 10K pull-up resistor which allows the device to be reset by connecting a capacitor between this pin and VSS.
Asserting RST when the chip is in Idle mode or Power-Down mode returns the chip to normal operation.
The output is active for at least 12 oscillator periods when an internal reset occurs.D+
29
29
DVCC
I/O
For Serial reader: Connect this pin to GND.For USB reader:
USB Positive Data Upstream Port
This pin requires an external serial resistor of 27Ω (AT8xC122) or 33Ω (AT83C5123) and a 1.5 K Ω pull-up to V REF for full speed configuration.D-28
28
DVCC
I/O
For Serial reader: Connect this pin to GND.For USB reader:
USB Negative Data Upstream Port
This pin requires an external serial resistor of 27Ω (AT8xC122) or 33Ω (AT83C5123)
V REF
3030AVCC O
For Serial reader: Leave this pin unconnected.For USB reader:
USB Voltage Reference : 3.0 < V REF < 3.6 V
V REF  can be connected to D+ through a 1.5 K Ω resistor. The V REF  voltage is
controlled by software.
XTAL11414VCC I
Input to the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal or an external oscillator must be connected to this pin.
XTAL21515VCC O
Output of the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal circuit must be connected to this pin. If an external oscillator is used, leave XTAL2 unconnected.PLLF 2626AVCC O
PLL Low Pass Filter input
Receives the RC network of the PLL low pass filter.AVCC
黑龙江省卫生信息网
27
27
PWR
Analog Supply Voltage
AVCC is used to supply the internal 3.3V analog regulator which supplies the internal USB driver VCC
12
12
PWR
Supply Voltage
VCC is used to supply the internal 3.3V digital regulator which supplies the PLL, CPU core and internal I/O’s LI
10
10
PWR
DC/DC Input
LI supplies the current for the charge pump of the DC/DC converter.
- LI tied directly to VCC : the DC/DC converter must be configured in regulator mode.
- LI tied to VCC through an external 10µH coil : the DC/DC converter can be configured either in regulator or in pump mode.CVCC
9
9
PWR
中华口腔医学网Card Supply Voltage
CVCC is the ouput of internal DC/DC converter which supplies the Smart Card Interface. It must be connected to an external decoupling capacitor of 10 µF with the lowest ESR as this parameter influences on the CVCC noise
Table 1.  Pin Description  (Continued)
Port
V Q F P 32
Q F N 32
Internal Power Supply
ESD
I/O
Reset Level
Alt
AT83C23OK
DVCC
1
1
玉娇丽
PWR
Digital Supply Voltage
DVCC is the output of the internal analog 3.3V regulator which supplies the USB driver. This pin must be connected to an external 680nF decoupling capacitor if the USB interface is used.
This output can be used by the application with a maximum of 10 mA.
CVSS
11
11
GND
DC/DC Ground
CVSS is used to sink high shunt currents from the external coil VSS 88GND Digital Ground
VSS is used to supply the PLL, buffer ring and the digital core AVSS
25
25
GND
Analog Ground
AVSS is used to supply the USB driver.
Table 1.  Pin Description  (Continued)
Port
V Q F P 32
Q F N 32
Internal Power Supply
ESD
I/O
Reset Level
Alt

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