Realtek Confidential
LCD TV Controller
社会经济
结构RTD2674S
RTD2674S LCD TV Controller
Revision 0.02 August 31, 2009
Author: James Wu
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Realtek Confidential
LCD TV Controller
RTD2674S
Feature
Analog TV IF demodulator
Support NTSC / PAL /SECAM IF demodulator Analog TV Video decoder Support NTSC/PAL/SECAM decode : NTSC-M, NTSC-443. PAL-BDGHI, PAL-M, PAL-N, PAL-60, PAL-CN SECAM. 3D comb filter for NTSC / PAL 2D/1D comb filter for NTSC/PAL and SECAM Analog VBI Decoder CC : CC1, 2, 3 and4, Text 1, 2, 3 and 4, XDS (eXtension Data Service), V Chip CGMS : ETSI EN 300 294, ITU-R BT.119 method, IEC61880 method, CC-XDS method WSS : ETSI EN 300 294, ITU-R BT.119 method, IEC61880 method, CC-XDS method TT: Teletext 1.5/2.5 ETSI EN 300 706 ATV audio-in standard Supports multi-standard TV broadcasting includes : BTSCStereo, EIA-J(FM-FM) and FM Stereo A2 System NICAM 728 digital sound for B/G/L/I/D/K system Analog RGB/YPbPr Input Interface Total 3x Analog inputs for YpbPr and VGA YPbPr input up to 1080p which is shared with VGA RGB input up to WUXGA Support Sync-On-Green(SOG) and Composite-Sync(CS) mode Digital Video Input Interface 1x video-10 input is supported HDMI 1.3 Compliant Digital Input Interface 2 x HDMI/DVI RX port with D-switch is supported Operation up to 3.4GHz High-Bandwidth Digital Content Protection (HDCP) 1.3 Support CEC Digital Video Output Interface Integrated 10-bit LVDS transmitter for VESA & JEIDA Support up to WUXGA 1920x1080p Full HD panel Audio IO Two channel (Stereo) DAC support 32KHz, 44.1KHz, 48KHz, 88.2KHz, 96KHz, 176.4KHz, 192KHz sampl
e rate Support 16-bit, 20-bit, 24-bit PCM data Support S/PDIF input/output for stereo PCM & non-PCM data 48KHz baseband ADC Sample rate SRS / BBE software post processing is supported 2 High-Quality Video Processor Color-RecoverTMIII for video cross color reduction Clean-PictureTM III for spatial/temporal and Mosquito noise reduction Pixel-ComposerTMIII for following feature: Support 1080i / 480i / 576i de-interlacing Inverse 3:2/2:2 pull-down for Film Mode detection 3D Motion Adaptive De-interlace Low Angel interpolation processing Vivid-ColorTM Support YUV/YCrCb/YPrPb to RGB and sRGB matrix color-space conversion Support DLTI/DCTI video-quality improvement ICM for Color Manager Support Black/White Level Expansion Support 2D Y peaking filter and coring Support ACC sRGB compliance xvYCC support Peripheral IO USB 2.0 Host ports with embedded PHY Support two 16550 UARTs, each has 16-byte FIFO. Support one IrDA Rx interface, which complies with NEC, SHARP, Sony SIRC protocol I, Philips RC-5 and 48-bit Panasonic protocol. Support 2 x I2C master/slave interfaces Audio Decompression Support MPEG1 layer 1/2/3, LPCM and other formats Picture Format HD JPEG decoding with unlimited resolution MemoryInterface Support 1 x 16bit DDR SDRAM Support DDR memory up to 64M bytes memory access speed up to DDR SDRAM@250MHz Support external SPI flash up to 32MB Power & Technology 3.3V/1.2V power supplier; 2.5V for DDR I/O interface LQFP216 package 27MHz crystal clock with embedded PLL
Realtek Confidential
LCD TV Controller
RTD2674S
东北林业大学
学报1.1
System Block Diagram
Figure 1 System Architecture
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大容量
存储器Realtek ConfidentialLCD TV Controller
1.2 Application Diagram
aisRTD2674S
HDMI
HDMI
HDMI HDMI
(*) Need to Confirm with Panel Spec
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1.3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 U8 E-PAD 217
QFP216E
Pin List
VCM_BB AVDD_BB0_3.3V AIN_5L/LSADC6 AIO_2R AIO_2L AIO_1R AIO_1L AIN_4R AIN_4L AIN_3R AIN_3L AIN_2R AIN_2L AIN_1R AIN_1L AOUT_R AOUT_L HPOUT_L HPOUT_R SCART_F
SW_0 SCART_FSW_1 DAC_VDD_3.3V AVOUT_1 AVOUT_2 DAC_GND ADC2X_GND_3.3V IF_N IF_P ADC2X_VDD PLL_GND XIN XOUT PLL_VDD_3.3V CORE_1.2V USB_AVDD_3.3V HSDM HSDP USB_AVDD_1.2V I2C0_SCL I2C0_SDA IO_3.3V GPIO_A0/RF_AGC GPIO_A1/IF_AGC CORE_1.2V O_FP O_FN O_EP O_EN O_DP O_DN O_CP O_CN O_BP O_BN
LCD TV Controller
RTD2674S LQFP-216 E-PAD
3
55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 AGND_BB1 AVDD_BB1_3.3V (CVBS)VIN_14P VIN_A2N (CVBS/SV-C)VIN_13P (CVBS/SV-Y)VIN_10P VIN_A1N (SV-C)VIN_12P (SV-Y)VIN_9P VIN_A0N (SV-C/FSC_CVBS)VIN_11P VD_GND VD_VDD_1.2V ADC_VDD_1.2V (FSC_R/Y)VIN_8P (FSC_G/Pr)VIN_7P VIN_Y1N (FSC_B/Pb)VIN_6P (Pr)VIN_5P (Y)VIN_4P VIN_Y0N (Pb)VIN_3P VIN_2N (VGA_R)VIN_2P VIN1_N (VGA_B)VIN_1P VIN_0N (VGA_G)VIN_0P VD_VDD_3.3V ADC_VDD_3.3V VSYNC HSYNC APLL_GND APLL_VDD_3.3V TMDS_1.2V TMDS_REXT P0_RX0P/HDMI_2P_0 P0_RX0N/HDMI_2
N_0 P0_RX1P/HDMI_1P_0 P0_RX1N/HDMI_1N_0 P0_RX2P/HDMI_0P_0 P0_RX2N/HDMI_0N_0 P0_RX3P/HDMI_CLKP_0 P0_RX3N/HDMI_CLKN_0 P1_RX0P/HDMI_2P_1 P1_RX0N/HDMI_2N_1 P1_RX1P/HDMI_1P_1 P1_RX1N/HDMI_1N_1 P1_RX2P/HDMI_0P_1 P1_RX2N/HDMI_0N_1 P1_RX3P/HDMI_CLKP_1 P1_RX3N/HDMI_CLKN_1 TMDS_3.3V TMDS_1.2V CEC HDDC0_SCL HDDC0_SDA HDDC1_SCL HDDC1_SDA VGA_DDC_SCL VGA_DDC_SDA IO_3.3V GPIO_C8 GPIO_C6 GPIO_C5 STBY_CORE_1.2V SPI_DI SPI_DO SPI_SCK SPI_CS_N RESET_IN GPIO_C4 GPIO_C3 GPIO_C2 GPIO_C1 GPIO_C0 STBY_CORE_1.2V LSADC4/GPIO LSADC2/GPIO LSADC1/GPIO LSADC0/GPIO LSADC_REF IO_3.3V CORE_1.2V DQS1 DQ_8 DQ_9 DDR_IO_2.5V DQ_10 DQ_11 DQ_12 DQ_13 DQ_14 DQ_15 DDR_VREF DDR_IO_2.5V DM1 CK# CK DDR_IO_2.5V CKE ADDR12 ADDR11 ADDR9 ADDR8 ADDR7 ADDR6 ADDR5
O_AP O_AN IO_3.3V E_FP E_FN E_EP E_EN E_DP E_DN E_CP E_CN E_BP E_BN E_AP E_AN CORE_1.2V TCON/GPIO_B0 TCON/GPIO_B2 TCON/GPIO_B3 TCON/GPIO_B4 TCON/GPIO_B5 TCON/GPIO_B6 TCON/GPIO_B7 TCON/GPIO_B8 IO_3.3V TCON/GPIO_B9 TCON/GPIO_B10 TCON/GPIO_B12 CORE_1.2V DQS0 DQ_7 DQ_6 DDR_IO_2.5V DQ_5 DQ_4 DQ_3 DQ_2 DQ_1 DQ_0 DDR_IO_2.5V DM0 WE# CAS# RAS# CORE_1.2V BA0 BA1 ADDR10 ADDR0 ADDR1 ADDR2 ADDR3 DDR_IO_2.5V ADDR4
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RTD2674S
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