These N-Channel enhancement mode power field effect Transistors are produced using planar stripe, DMOS technology.
GFP5N60是增强型N 沟道功率场效应管，采用平面条形DMOS 工艺生产制造。 This advanced technology has been especially tailored to minimize on -state resistance , provide superior switching performance,and Withstand high energy pulse in the avalanche and commutaion mode .These devices are well suited for high efficiency switch mode power supply.
GFP5N60具有低导通电阻、优越的开关特性以及抗雪崩击穿能力，适合用于高效开关电源。 Absolute Maximum ratings （极限参数，除非另有规定，T=25 ℃）
General Description(概述)
GFP5N60
TO-220
1.Gate
2.Drain
3.Source
新工人艺术团
Figure 6. Gate Charge Characteristics
※Notes:1.V GS =0V 2. f=1MHZ
C iss =C gs +C gd (C gd =shorted)C oss =C ds +C gd C rss =C gd Figure 5.Capacitance Characteristics
V DS,Drain-Source VoltageWave [V ]
C a p a c i t a n c e [P F现代工业
]
2104681200
3
200400
600800
1000
120010-1
100
101
大型纺织厂
0C iss C oss
C rss
Figure 2.Transfet Characteristics
V GS,Gate-Source Voltage [V ]
I D ,D r a i n C u r r e n t [A ]
※Notes:1.V DS =50V
2. 250us Pulse test
150℃25℃
-55℃
100
101
10-1
2
6
4
8
10农具模型
Figure 10. Maximum Drain Current
vs. Case Temperature
T C,Case Temperature [℃]
※Notes:1.V GS =0V 2. I D =250uA
Figure 7. Breakdown Voltage Variation
vs.Temperature
T J,JunctionTemperature [℃]
B V D S S ,(N o r n a l i z e d )
D r a i n -S o u r c e B r e a k d o w n V o l t a g e
R D S (O N ),(N o r n a l i z e d )D r a i n -S o u r c e O n -R e s i s t a n c e
※Notes:1.V GS =10V 2. I D =2.5A
Figure 8. On-Resistance Variation
vs.Temperature
T J,JunctionTemperature [℃]
0.81.1
0.9
1.0
1.2
-
马克思唯物史观100
-50
100
50
150
200
-100
-50
100
50
150
200
0.01.50.51.0
2.5
2.0
3.0
01
2
4
3
25
75
50
100
125
150
5
※Notes:1. T C =25℃2. T J =150℃
3. Single Pulse Operation in This Area Is Limited by R DS (on )
Figure 9. Maximum Safe Operating Area
V DS,Drain-Source VoltageWave [V ]I D ,D r a i n C u r r e n t [A ]
I D ,D r a i n C u r r e n t [A ]
100us 1ms 10ms DC
100
101
102
103
100
10-1
10
1
V GS
10V
Charge
DS
Fig 12. Gate Charge test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching test Circuit & Waveforms
Fig 13.Switching test Circuit & Waveforms
电子束加工DS )
V DS
V in
90%
10%
R L
L
BV DSS
I AS V DD
2BV DSS
1
Fig 15. Peak Diode Recovery dv/dt test Circuit & Waveforms
V DD
V GS I S V DS I ,Body Diode Forward Current
Forward Voltage Drop
豫公网安备41160202000603
站长QQ:729038198
关于我们
投诉建议