SYR827

SYR827
High Efficiency 5.5V, 6A, 2.4MHz I C Programmable, Synchronous Step Down Regulator
2
Preliminary Specification General Description
SYR827 is a high efficiency 2.4MHz synchronous step down DC/DC regulator IC capable of delivering up to 6A output currents. It can operate over a wide input voltage range from 2.6V to 5.5V and integrate main switch and synchronous switch with very low RDS (ON) to minimize the conduction loss. The output voltage can be programmed from 0.7125V to 1.5V through I2C interface. SYR827 is in a space saving, low profile CSP1.56*1.96-20 package.
Features
• • • • • • • • • • Input voltage range: 2.6V to 5.5V 2.4 MHz switching frequency minimizes the external components Typical 65uA quiescent current Low RDS(ON) for internal switches (PFET/NFET): 28mΩ/17mΩ Programmable Output Voltage: 0.7125V to 1.5V in 12.5mV steps 6A continuous output current capability. Capable for 0.25uH inductor and 22uF Ceramic Capacitor. Hic-cup mode protectio
n for hard short condition RoHS Compliant and Halogen Free Compact package: CSP1.56*1.96-20
Ordering Information
SYR827 □(□□)□ Temperature Code Package Code Optional Spec Code
Ordering Number SYR827PKC Package Type CSP1.56*1.96-20 Slave Address 0x40H
Applications
• • Smart-phone Web-tablets
Typical Applications
Figure 1. Schematic Diagram
SYR827 Rev.0.1
Silergy Corp. Confidential-Prepared for Customer Use Only
1
SYR827
Pinout (top view)
Part Number SYR827PKC
fromsport
Package type CSP1.56*1.96-20
Top Mark① Ab xyz
Note① : x=year code, y=week code, z= lot number code.
Pin
Pin Name
Pin Description
D1,D2,E1,E2 D3,D4,E3,E4 B2,B3,C1,C2,C3,C4 A1 A2 B1 B4 A3 A4
VIN SW GND VSEL EN SDA AGND SCL VOUT
Power input pin. These pins must be decoupled to ground with at least 22uF ceramic capacitor. The input capacitor should be placed as close as possible between VIN and GND pins. Switching node pin. Connect these pins to the switching node of inductor. Power ground pins. Voltage select pin. When this pin is low, VOUT is set by the VSEL0 register. When this pin is high, VOUT is set by the VSEL1 register. Enable control pin. Active high. Do not leave it floating. I2C interface clock line. Analog ground pin. I2C interface Bi-directional Data line. Sense pin for output. Connect to the output capacitor side.
宫崎滔天SYR827 Rev. 0.1
Silergy Corp. Confidential- Prepared for Customer Use Only
2
Absolute Maximum Ratings (Note 1)
VIN--------------------------------------------------------------------------------------------------------------------------- 6.0V All Other Pins-------------------------------------------------------------------------------------------------------- VIN + 0.6V Power Dissipation, PD @ TA = 25°C CSP1.56*1.96-20-------------------------------------------------------------- 2.6W Package Thermal Resistance (Note 2)
θ JA ------------------------------------------------------------------------------------------------------------38°C/W θ JC ------------------------------------------------------------------------------------------------------------- 8°C/W
Junction Temperature Range ------------------------------------------------------------------------------------------ 150°C Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C Storage Temperature Range --------------------------------------------------------------------------------- -65°C to 150°C ESD Susceptibility (Note 2)
Recommended Operating Conditions (Note 3)
Supply Input Voltage -------------------------------------------------------------------------------------------- 2.6V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------- -40°C to 125°C Ambient Temperature Range --------------------------------------------------------------------------------- -40°C to 85°C
SYR827 Rev. 0.1
Silergy Corp. Confidential- Prepared for Customer Use Only
3
SYR827
Electrical Characteristics
(VIN = 5V, VOUT = 1.0V, L = 0.25uH, COUT = 22uF, TA = 25°C, unless otherwise specified)
Parameter Input Voltage Range VIN UVLO VIN UVLO Hysteresis Quiescent Current Shutdown Current EN, VSEL, SDA, SCL Rising threshold Falling threshold VOUT Accuracy NFET RDS(ON) PFET RDS(ON) PMOS peak current limit NMOS peak current limit Internal soft-start time Min on time Oscillator Frequency Thermal Shutdown Temperature Thermal Shutdown Hysteresis LX node discharge resistor Input OVP shutdown Over voltage protection blanking time
Symbol VIN VUVLO VUVHYST IQ ISHDN_H/W ISHDN_S/W VIH VIL VREG RDS(ON)N RDS(ON)P ILIM_PEAK ILIM_VALLEY tSS FOSC TSD THYS RDSH VOVP TBlanking
Test Conditions VIN Rising IOUT=0, EN=1, FB=105%*VREF EN=0 EN=VIN, Buck_ENx=0
Min 2.6
Typ 2.45 150 65 0.1 30
Max 5.5 2.55
Unit V V mV µA µA V V % mΩ mΩ A A us ns MHz °C °C Ω V V us
1.1 0.4 Forced PWM, VOUT=VSEL0, default value -1.5 17 28 7.5 6 300 40 2.4 150 15 150 6.15 5.85 20 +1.5
Rising threshold Falling threshold
5.5
Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification is not implied. Expo
sure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2: θ JA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3: The device is not guaranteed to function outside its operating conditions.
science directSYR827 Rev. 0.1
Silergy Corp. Confidential- Prepared for Customer Use Only
4
SYR827
Enabling Function
The EN pin controls SYR827 start up. EN pin low to high transition starts the power up sequence. If EN pin is low, the DC/DC converter will be turned off. SYR827 allows software to enable of the regulator when EN is HIGH, via the BUCK_EN bits. BUCK_EN0 and BUCK_EN1 are both initialized HIGH in the registers. Hardware and Software Enable control table. Pins EN VSEL 0 x 1 0 1 0 1 1 1 1 Bits BUCK_EN0 x 0 1 x x BUCK_EN1 x x x 0 1 OUTPUT OFF OFF ON OFF ON
Input Over Voltage Protection Function
When the VIN exceeds over voltage protection threshold, SYR827 will stop switching to protect the circuitry. An internal 20us blanking time helps to prevent the circuit from shutting down due to noise spikes.
I2C Interface
SYR827 features an I2C interface that allow the HOST processor to control the output voltage achieve the DVS function. The I2C interface supports clock speeds of up to 3.4MHz and uses standard I2C commands. SYR827 always operates as a slave device, and is addressed using a 7-bit slave address followed by an 8th bit, which indicates whether the transaction is a read-operation or a write-operation. I2C address of the SYR827 is set at the factory to 0x40h. START and STOP Conditions: SYR827 is controlled via an I2C compatible interface. The START condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The STOP condition is a LOW to HIGH transition on the SDA line while SCL is HIGH. A STOP condition must be sent before each START condition. The I2C master always generates the START and STOP conditions.
Data Validity: The data on the SDA line must be stable during the HIGH period of the SCL, unless ge
nerating a START or STOP condition. The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW.
SYR827 Rev. 0.1
Silergy Corp. Confidential- Prepared for Customer Use Only
5科学幻想之父

本文发布于:2024-09-23 05:16:15,感谢您对本站的认可!

本文链接:https://www.17tex.com/xueshu/398886.html

版权声明:本站内容均来自互联网,仅供演示用,请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系,我们将在24小时内删除。

标签:房屋   试纸   公园   测癌
留言与评论(共有 0 条评论)
   
验证码:
Copyright ©2019-2024 Comsenz Inc.Powered by © 易纺专利技术学习网 豫ICP备2022007602号 豫公网安备41160202000603 站长QQ:729038198 关于我们 投诉建议