FEATURES
n Video Decoder
ŸSupports NTSC, PAL and SECAM video input formats
Ÿ2D NTSC and PAL comb-filter for Y/C
第一次熬夜separation of CVBS input
ŸMultiple CVBS and S-video inputs
ŸSupports Closed-caption and V-chip
ŸBuilt-in anti-aliasing filter for analog-front-end ŸACC, AGC, and DCGC (Digital Chroma Gain Control)
n Analog Input
ŸSupports RGB input format from PC,
camcorders and GPS
ŸSupports YCbCr inputs from conventional video source and HDTV
ŸSupports video input 480i, 480p, 576i, 576p, 720p, 1080i; RGB input resolution in 640x480,
800x480, 800x600(SVGA), and 1024x768(XGA) Ÿ3-channel low-power 10-bit ADCs integration for YCbCr or CVBS or S-Video; ADC frequency
up to 86MHz
Ÿ3-channel 8-bit ADC for navigator RGB input;
ADC frequency up to 86MHz
ŸSupports RGB composite sync input (CSYNC), SOY, SOG, HSYNC, and VSYNC
ŸOn-chip clock synthesizer and PLL
ŸAuto-position adjustment, auto-phase
adjustment, auto-gain adjustment, and
保健食品管理办法auto-mode detection n Digital Video Input
ŸSupports ITU-R BT.656 digital video input and progressive ITU-R BT.656 compatible input
format
ŸSupports ITU-R BT.601 8/16-bit digital video input
ŸSupports digital 666/888 input
n Digital/Analog Output
Ÿ3-channel low-power 8-bit DAC for RGB output, dynamic range 0.1-4.9 V n Video Processing
Ÿ2-D video de-interlacer
ŸEdge-oriented adaptive algorithm for smooth low-angle edges
ŸPIP/POP with programmable size and location, supports multi-video applications
Ÿ3-D video noise reduction for SDTV and 2-D video noise reduction for HDTV input ŸBrightness, contrast, saturation, and hue adjustment
Ÿ9-tap programmable multi-purpose FIR (Finite Impulse Response) filter
ŸDifferential 3-band peaking engine
ŸVertical peaking
ŸLuminance Transient Improvement (LTI)
ŸChrominance Transient Improvement (CTI)
ŸBlack Level Extension (BLE)
ŸWhite Level Extension (WLE)
ŸFavor Color Compensation (FCC)
Ÿ3-channel gamma curve adjustment
ŸIndependent 6 color of saturation, hue, and brightness control
n Digital PWM Controller
ŸIntegrated general purpose digital PWM
control loop
福州人造板厂
ŸProgrammable startup operating frequency and period with output voltage regulation ŸProgrammable output current regulation; 40KHz~70KHz switching frequency, sync. to
HSYNC possible
ŸBurst-mode or continuous-mode for output current regulation; 150Hz~300Hz burst-mode
frequency, sync. to VSYNC possible
ŸProgrammable protection level for input
voltage and fault detection
n LVDS/TTL Panel Interface
ŸSupports up to 8-bit single link LVDS
ŸSupports up to 8-bit TTL panel output with TCON
ŸSupports digital panels up to 800x480,800x600 (SVGA), 960x540(QHD) and 1366x768(WXGA)
Mstar Confidential
for 西门子威迪欧
汽车电子(惠州)有限公司lnternal Use Only Ÿ Programmable 24-bit (RGB888) digital output with HSYNC/VSYNC or 18-bit (RGB666) digital output with TCON
Ÿ Supports various displaying modes Ÿ Supports horizontal panorama scaling n
2D Graphics Engine
Ÿ Line draw, rectangle draw/fill and color expansion acceleration
Ÿ 16/256-color graphic OSD with two non-overlapping display windows Ÿ Graphic display path of 720x576 with anti-flicker filter
Ÿ One video display path of 720x576 with H/V scaling from 0.5 to 2 n
Miscellaneous Ÿ Built-in MCU
Ÿ I 2C bus interface for configuration setup Ÿ Supports 10-bit gamma table
Ÿ Supports H/V sync out from CVBS for old NAVI system
Ÿ Built-in step-down PWM circuits for input 1.8V and 3.3V
Ÿ Built-in step-up boost circuits (for VGL and VGH)
Ÿ DC/DC level adjustment circuit
Ÿ 16-bit data bus for external SDR DRAM frame buffer
Ÿ Supports up to 8MB external SDR DRAM interface
Ÿ Supports 1Mbx16 embedded SDR DRAM Ÿ Spread spectrum clocks
Ÿ Optional 3.3V/5V TCON pads with programmable driving current Ÿ 216-pin LQFP package
BLOCK DIAGRAM
Digital RGB To LCD Panel
BT.656/601
RGB
YPbPr Y/C CVBS
Touch Panel
Keypad
IR
SDRAM
Feedback Voltage
DPWM Output
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SYSTEM APPLICATION DIAGRAM
Flash / ROM 1.8/3.3V
WVGA TFT Panel
800x480
GENERAL DESCRIPTION
The MST776-I is a high quality ASIC for Car TV and portable DVD player applications. It receives analog NTSC/PAL/SECAM CVBS and S-Video inputs from TV tuners, DVD or VCR sources, including weak and distorted lnternal Use Only signals, as well as analog RGB input from GPS systems. Automatic gain control (AGC) and 10-bit 3-channel A/D converters provide high resolution video quantization. With automatic video source and mode detection, users can easily switch and adjust variety of signal sources. Multiple internal adaptive PLLs precisely extract pixel clock from video source and perform sharp color demodulation. PIP/POP is provided for multimedia applications. Built-in line-buffer supports adaptive 2-D comb-filter, 2-D sharpening, and synchronization stabler in a condensed manner. The output format of MST776-I supports 8-bit TTL or LVDS digital TFT-LCD modules.
PIN DIAGRAM (MST776-I)
79
80
78
81
83
B O U T [1]B O U T [0]D T
C O N [0]V I _C L K I N V I _
D A T A [12]V I _D A T A [9]V I _D A T A [17]V I _D A T A [18]V I _D A T A [19]V I _D A T A [22]M D A T
A [15]M D A T A [13]M D A T A [12]M D A T A [10]M D A T A [9]V I _D A T A [20]V I _D A T A [21]V I _D A T A [23]M D A T A [14]G N D M D A T A [5]M D A T A [4]M D A T A [3]V D D C V D _V S Y N C O V D _H S Y N C O V D _C L K O V I _D A T A [10]V I _D A T A [11]V D D C XOUT GND VD[3]VD[2]VD[1]VSYNCIN1REFP AVDD_33钙盐
BINP GINP PBINP SOY YINP VD[0]HSYNCIN1VCLAMP REFM GND SOGIN RINP YS1INP CVBS2P YINM PRINP PRINM AVDD_18PWM_REXT GND PGOOD PWM_FB1SENSE1
VDDP50_PWM
PWMOUT1
GND PWMOUT2PWM_FB2SENSE2
VDDP50_PWM
DRVBST
GND BOOSTON
FBBST CSBST B O U T [3]B O U T [4]Q 2
G N D F B 2_D P W M F B 1_D P W M S A R 3S A R 0S A R _I N T P _Y 1T P _Y 2W A K E U P I N T V I N A V D D _D P W M S A R 1G N D T P _X 1T P _X 2V D D P 50_T P V D D C G N D V D D P _33C S S C L S D A H W R E S E T S P I _S D I S P I _S C Z U A R T 1_R X L H S Y N C L V S Y N C L C K G N D V D D P _33S A R 2S P I _S C K V D D P _50C1INP C1INM YS1INM CVBS1P AVDD_33
GND VD[5]VD[4]AVDD_PWM
S P I _S D O B O U T [2]M D A T A [6]V D D P _33M D A T A [11]V I _D A T A [13]V I _D A T A [16]V I _D A T A [14]V I _D A T A [15]V I _D A T A [8]V I _D A T A [7]V I _D A T A [6]H S Y N C I N 2V S Y N C I N 2F B U A R T 1_T X G P I O _P 00M D A T A [2]M D A T A [1]M D A T A [0]G N D A V D D _M I W E Z
V D D P _33G N D M D A T A [8]D Q M [1]D Q M [0]M D A T A [7]G P I O _P 01G P I O _P 02G P I O _P 03G P I O _P 04G P I O _P 05G P I O _P 06L D E QOR Q1
B O U T [5]B O U T [6]
CASZ RASZ X I N A V D D _M P L L
Note: This pin diagram is based on 8-bit TTL output.
MST776-I
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Mstar Confidential 西门子威迪欧惠州 lnternal Use Only
PIN DESCRIPTION MCU Interface
Pin Name Pin Type Function
Pin SAR3 Analog Input SAR Low Speed ADC Input 3 61 SAR2 Analog Input SAR Low Speed ADC Input 2 62 SAR1 Analog Input SAR Low Speed ADC Input 1 63 SAR0 Analog Input SAR Low Speed ADC Input 0
64 SAR_IN Analog Input SAR Low Speed ADC Input for Keypad 66 SPI_SCK Output SPI Flash Serial Clock 81 SPI_SDI Output
SPI Flash Data Input 82 SPI_SDO Input w/ 5V-tolerant SPI Flash Data Output 83 SPI_SCZ
Output
SPI Flash Chip Select
84
GPIO_P00-GPIO_P06 I/O w/ 5V-tolerant General Purpose Input/Output; 4mA driving strength
87-93 INT Input
External Interrupt Input
73 CS
Input w/ 5V-tolerant 3-Wire Serial Bus Chip Select; active high 77 SCL Input w/ 5V-tolerant 3-Wire Serial Bus Clock Input
78 SDA
I/O w/ 5V-tolerant
3-Wire Serial Bus Data; 4mA driving strength
79 HWRESET Schmitt Trigger Input w/ 5V-tolerant
Hardware Reset; active high 80
Analog Video Interface
Pin Name Pin Type Function Pin VCLAMP CVBS/YC Mode Clamp Voltage Bypass 11 REFP Internal ADC Top De-coupling Pin 12 REFM
中央轴空病Internal ADC Bottom De-coupling Pin 13 PRINP Analog Input Analog Pr Input of HDTV
24 PRINM Analog Input Reference Ground for Analog Pr Input of HDTV 25 PBINP Analog Input Analog Pb Input of HDTV 20 SOY Analog Input Sync-on-Y Slicer Input 21 YINP Analog Input Analog Y Input of HDTV
22 YINM Analog Input Reference Ground for Analog Y Input of HDTV 23 BINP Analog Input Analog B Input of VGA 16 SOGIN Analog Input Sync-on-Green Slicer Input 17 GINP
Analog Input
Analog G Input of VGA
18
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