1前言 1
电路结构 1
schematic原理图绘制 3
#
生成测试电路 3
电路的仿真与分析 4
直流仿真 4
交流仿真 4
版图绘制 5
差分对版图设计 6
电流源版图设计 7
负载MOS管版图设计 7
.
DRC验证 8
LVS验证 8
4结论 9
5参考文献 9
摘要
本文利用cadence软件简述了二级运算放大器的电路仿真和版图设计。以传统的二级运算放大器为例，在ADE电路仿真中实现工艺，输入直流电源为5v，直流电流源范围27~50uA,根据电路知识，设置各个MOS管合适的宽长比，调节弥勒电容的大小，进入stectre仿真使运放增益达到40db，截止带宽达到80MHz和相位裕度至少为60。。版图设计要求DRC验证0错误，LVS验证使电路图与提取的版图相匹配，观看输出报告，要求验证比对结果一一对应。 关键词：cadence仿真，设计指标，版图验证。
Abstract
工艺，输入直流电源为5v，直流电流源范围27~50uA,根据电路知识，设置各个MOS管合适的宽长比，调节弥勒电容的大小，进入stectre仿真使运放增益达到40db，截止带宽达到80MHz和相位裕度至少为60。。版图设计要求DRC验证0错误，LVS验证使电路图与提取的版图相匹配，观看输出报告，要求验证比对结果一一对应。
In this paper, the circuit simulation and layout design of two stage operational amplifier are briefly described by using cadence software. In the traditional two stage operational amplifier as an example, the realization of technology in ADE circuit simulation, the input DC power supply 5V DC current source 27~50uA, according to the circuit knowledge, set
up each MOS tube suitable ratio of width and length, the size of the capacitor into the regulation of Maitreya, the simulation of stectre amplifier gain reaches 40dB, the cut-off bandwidth reaches 80MHz and the phase margin of at least 60.. The layout design requires DRC to verify 0 errors, and LVS validation makes the circuit map matching the extracted layout, viewing the output report, and requiring verification to verify the comparison results one by one.
关键词：cadence仿真，设计指标，版图验证。
Key words: cadence simulation, design index, layout verification.
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