LNK623-626
粉体气力输送
系统LinkSwitch-CV Family www.powerint September 2009
Energy-Effi cient, Off-line Switcher with Accurate Primary-side Constant-Voltage (CV) Control
®
Output Power Table
Product 3
230 VAC ±15%
85-265 VAC Adapter 1Peak or Open Frame 2Adapter 1Peak or Open Frame 2LNK623PG/DG 6.5 W 9 W 5.0 W 6 W LNK624PG/DG 7 W 11 W 5.5 W 6.5 W LNK625PG/DG 8 W 13.5 W 6.5 W 8 W LNK626PG/DG
10.5 W
17 W
8.5 W
10 W
Table 1. Output Power Table. Based on 5 V Output. Notes:
1. Minimum continuous power in a typical non-ventilated enclosed adapter measured at +50 °C ambient.
2. Maximum practical continuous power in an open frame design with adequate heatsinking, measured at 50 °C ambient (see Key Application Considerations section for more information).
3. Packages: P: DIP-8C, D: SO-8C.钛合金
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Product Highlights
Dramatically Simplifi es CV Converters
• Eliminates optocoupler and all secondary CV control circuitry • Eliminates bias winding supply – IC is self biasing
Advanced Performance Features
• Compensates for external component temperature variations • Very tight IC parameter tolerances using proprietary trimming technology
• Continuous and/or discontinuous mode operation for design fl exibility
• Frequency jittering greatly reduces EMI fi lter cost
• Even tighter output tolerances achievable with external resistor selection/trimming Advanced Protection/Safety Features
• Auto-restart protection reduces delivered power by >95% for output short circuit and all control loop faults (open and shorted components)
• Hysteretic thermal shutdown – automatic recovery reduces power supply returns from the fi eld
• Meets HV creepage requirements between Drain and all other pins, both on the PCB and at the package EcoSmart ® – Energy Effi cient
• No-load consumption <200 mW at 230 VAC and down to below 70 mW with optional external bias • Easily meets all global energy effi ciency regulations with no added components
• ON/OFF control provides constant effi ciency down to very light loads – ideal for mandatory EISA and ENERGY STAR 2.0 regulations
• No primary or secondary current sense resistors – maximizes effi ciency Green Package
• Halogen free and RoHS compliant package
Applications • DVD/STB • Adapters
• Standby and auxiliary supplies
• Home appliances, white goods and consumer electronics • Industrial controls
Description
The LinkSwitch-CV dramatically simplifies low power, constant voltage (CV) converter design through a revolutionary control technique which eliminates the need for both an optocoupler and secondary CV control circuitry while providing very tight output voltage regulation. The combination of proprietary IC trimming and E-Shield™ transformer construction techniques enables Clampless™ designs with the LinkSwitch-CV LNK623/4.
Figure 1. Typical Application Schematic (a) and Output Characteristic Envelope (b).
*Optional with LNK623-624PG/DG. (see Key Application Considerations section for
clamp and other external circuit design considerations).
LinkSwitch-CV provides excellent cross-regulation for multiple-output flyback applications such as DVDs and STBs. A 700 V power MOSFET and ON/OFF control state machine, self-biasing, frequency jittering, cycle-by-cycle current limit, and hysteretic thermal shutdown circuitry are all incorporated onto one IC.
Rev. E 09/09
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Pin Functional Description
DRAIN (D) Pin:
This pin is the power MOSFET drain connection. It provides internal operating current for both start-up and steady-state operation.
BYPASS (BP) Pin:
This pin is the connection point for an external bypass capacitor for the internally generated 6 V supply.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is controlled by this pin. This pin senses the AC voltage on the bias winding. This control input regulates the output voltage based on the fl yback voltage of the bias winding.SOURCE (S) Pin:
This pin is internally connected to the output MOSFET source for high voltage power and control circuit common returns.
Figure 2 Functional Block Diagram.
Figure 3. Pin Confi guration.
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Rev. E 09/09
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LinkSwitch-CV Functional Description
The LinkSwitch-CV combines a high voltage power MOSFET switch with a power supply controller in one device. Similar to the LinkSwitch-LP and TinySwitch-III it uses ON/OFF control to regulate the output voltage. The LinkSwitch-CV controller
consists of an oscillator, feedback (sense and logic) circuit, 6 V regulator, over-temperature protection, frequency jittering, current limit circuit, leading-edge blanking, and ON/OFF state machine for CV control.
Constant Voltage (CV) Operation
The controller regulates the feedback pin voltage to remain at V FBth using an ON/OFF state-machine. The feedback pin
voltage is sampled 2.5 μs after the turn-off of the high voltage switch. At light loads the current limit is also reduced to decrease the transformer fl ux density. Auto-Restart and Open-Loop Protection
In the event of a fault condition such as an output short or an open loop condition the LinkSwitch-CV enters into an appropriate protection mode as described below.
In the event the feedback pin voltage during the Flyback period falls below V FBth -0.3 V before the f
eedback pin sampling delay (~2.5 μs) for a duration in excess of 200 ms (auto-restart on-time (t AR-ON ) the converter enters into Auto-restart, wherein the power MOSFET is disabled for 2.5 seconds (~8% Auto-Restart duty cycle). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed.
In addition to the conditions for auto-restart described above, if the sensed feedback pin current during the Forward period of the conduction cycle (switch “on” time) falls below 120 μA, the
converter annunciates this as an open-loop condition (top
resistor in potential divider is open or missing) and reduces the Auto-restart time from 200 ms to approximately 6 clock cycles (90 μs), whilst keeping the disable period of 2.5 seconds. This effectively reduces the Auto-Restart duty cycle to less than 0.01%.Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature. The threshold is set at 142 °C typical with a 60 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power MOSFET is disabled and remains disabled until the die temperature falls by 60 °C, at which point the MOSFET is re-enabled.
Current Limit
The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold
(I LIMIT ), the power MOSFET is turned off for the remainder of that cycle. The leading edge blanking circuit inhibits the current limit comparator for a short time (t LEB ) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifi er reverse recovery time will not cause premature termination of the MOSFET conduction.
6.0 V Regulator
The 6 V regulator charges the bypass capacitor connected to the BYPASS pin to 6 V by drawing a current from the voltage on the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node. When the MOSFET is on, the device runs off of the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows the LinkSwitch-CV to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 1 μF is suffi cient for both high frequency decoupling and energy storage.
Rev. E 09/09
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Applications Example
Circuit Description
This circuit is confi gured as a three output, primary-side regulated fl yback power supply utilizing the LNK626PG. It can deliver 7 W continuously and 10 W peak (thermally limited) from an universal input voltage range (85 – 265 VAC). Effi ciency is >67% at 115 VAC/230 VAC and no-load input power is <140 mW at 230 VAC.
Input Filter
AC input power is rectifi ed by diodes D1 through D4. The rectifi ed DC is fi ltered by the bulk storage capacitors C1 and C2. Inductor L1, L2, C1 and C2 form a pi (π) fi lter, which attenuates conducted differential-mode EMI noise. This confi guration along with Power Integrations transforme
r
E-shield ™ technology allow this design to meet EMI standard EN55022 class B with good margin without requiring a低压
成型机 Y capacitor. Fuse F1 provides protection against catastrophic failure. Negative temperature coeffi cient thermistor RT1 limits the inrush current when AC is fi rst applied to below the
maximum rating of diodes D1 through D4. Metal oxide varistor RV1 clamps the AC input during differential line transients, protecting the input components and maintaining the peak
drain voltage of U1 below its 700 V BV DSS rating. For differential surge levels at or below 2 kV this component may be omitted.LNK626 Primary
The LNK626PG device (U1) incorporates the power switching device, oscillator, CV control engine, startup, and protection
functions. The integrated 700 V MOSFET provides a large drain voltage margin in universal input AC applications, increasing reliability and also reducing the output diode voltage stress by allowing a greater transformer turns ratio. The device can be completely self-powered from the BYPASS pin an
d decoupling capacitor C4. In this design a bias circuit (D6, C6 and R4) was added to reduce no load input power below 140 mW.
The rectifi ed and fi ltered input voltage is applied to one side of the primary winding of T1. The other side of the transformer’s primary winding is driven by the integrated MOSFET in U1. The leakage inductance drain voltage spike is limited by the clamp circuit D5, R1, R2, C3 and VR1. The zener bleed clamp
arrangement was selected for lowest no-load input power but in applications where higher no-load input power is acceptable VR1 may be omitted and the value of R1 increased to form a standard RCD clamp.
Output Rectifi cation
The secondaries of the transformer are rectifi ed by D7, D8 and D9. A Schottky barrier type was used for the main 5 V output for higher effi ciency. The +12 V and -22 V outputs use an ultrafast rectifi er diode. The main output is post fi ltered by L3 and C10 to remove switching frequency ripple. Resistors R7, R8 and R9 provide a preload to maintain the output voltages within their respective limits when unloaded. To reduce high frequency ringing and associated radiated EMI an
RC snubber formed by R10 and C13 was added across D7.
Figure 4. 7 W (10 W peak) Multiple Output Flyback Converter for DVD Applications with Primary Sensed Feedback.
Rev. E 09/09
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Output Regulation
The LNK626 regulates the output using ON/OFF control, enabling or disabling switching cycles based on the sampled voltage on the FEEDBACK pin. The output voltage is sensed using a primary referenced winding on transformer T1 eliminating the need for an optocoupler and a secondary sense circuit. The resistor divider formed by R3 and R6 feeds the winding voltage into U1. Standard 1% resistor values were used to center the nominal output voltages. Resistor R5 and C5 reduce pulse grouping by creating an offset voltage that is proportional to the number of consecutive enabled switching cycles. Key Application Considerations
Output Power Table
The data sheet maximum output power table (Table 1)
represents the maximum practical continuous output power level that can be obtained in a Flyback converter under the following assumed conditions:
1. The minimum DC input voltage is 100 V or higher at 90 VAC
input. The value of the input capacitance should be large enough to meet these criteria for AC input designs.2. Secondary output of 5 V with a Schottky rectifi er diode.3. Assumed effi ciency of 80%.
4. Continuous conduction mode operation (K P = 0.4).
5. Refl ected Output Voltage (V OR ) of 110 V .
6. The part is board mounted with SOURCE pins soldered to a
suffi cient area of copper to keep the SOURCE pin tempera-ture at or below 110 °C for P package and 100 °C for D packaged devices.
7. Ambient temperature of 50 °C for open frame designs and
an internal enclosure temperature of 60 °C for adapter designs.Note: Higher output power are achiev
able if the effi ciency is higher than 80%, typically for high output voltage designs.Bypass Pin Capacitor
A 1 μF Bypass pin capacitor (C4) is recommended. The capacitor voltage rating should be equal to or greater than 6.8 V. The capacitor’s dielectric material is not important. The capacitor must be physically located close to the LinkSwitch-CV BYPASS pin.
Circuit board layout
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LinkSwitch-CV is a highly integrated power supply solution that integrates on a single die, both the controller and the highvoltage MOSFET. The presence of high switching currents and voltages together with analog signals makes it especially
important to follow good PCB design practice to ensure stable and trouble free operation of the power supply.
When designing a board for the LinkSwitch-CV based power supply, it is important to follow the following guidelines:
Single Point Grounding
Use a single point (Kelvin) connection at the negative terminal of the input fi lter capacitor for the LinkSwitch-CV SOURCE pin and bias winding return. This improves surge capabilities by returning surge currents from the bias winding directly to the input fi lter capacitor. Bypass Capacitor
The BYPASS pin capacitor should be located as close as possible to the SOURCE and BYPASS pins.
Feedback Resistors
Place the feedback resistors directly at the FEEDBACK pin of the LinkSwitch-CV device. This minimizes noise coupling.Thermal Considerations
The copper area connected to the source pins provide the LinkSwitch-CV heat sink. A rule of thumb estimate is that the LinkSwitch-CV will dissipate 10% of the output power. Provide enough copper area to keep the source pin temperature below 110° C to provide margin for part to part R DS(ON) variation.Secondary Loop Area
To minimize leakage inductance and EMI, the area of the loop connecting the secondary winding, th
e output diode and the output fi lter capacitor should be minimized. In addition, suffi cient copper area should be provided at the anode and cathode terminal of the diode for heatsinking. A larger area is preferred at the quiet cathode terminal. A large anode area can increase high frequency radiated EMI.
Electrostatic Discharge Spark Gap
In chargers and adapters ESD discharges may be applied to the output of the supply. In these applications the addition of a spark gap is recommended. A trace is placed along the
isolation barrier to form one electrode of a spark gap. The other electrode, on the secondary side, is formed by the output return node. The arrangement directs ESD energy from the secondary to the primary side AC input. A 10 mil gap is placed near the AC input. The gap decouples any noise picked up on the spark gap trace to the AC input. The trace from the AC input to the spark gap electrode should be spaced away from other traces to prevent unwanted arcing occurring and possible circuit damage.
Rev. E 09/09
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Figure 5. PCB Layout Example.
Figure 6. Schematic Representation of Recommended Layout Without External Bias.Figure 7. Schematic Representation of Recommended Layout With
External Bias.
+
-
AC IN
PI-5269-122408
Y1-Capacitor
(optional)
Isolation Barrier Transformer
T1
Output Rectifiers
Primary Side
Secondary Side
缘114
R1
JP1
J1
C1
R3
R4
C12
R10
D9
C11
C13
D7
C9R9R8
D8
16
R7
C8
L3C10
C2
R2
C3
D1
D3
D5VR1D6
C6
R6R5
C5
C4
D4
RV1
F1
D2
RT1
L2L1
J2
Input Filter Capacitor Drain trace area miniminzed Clamp
Components
Copper area maximized for heatsinking
DC Outputs
ESD spark gap
Bypass Capacitor close to device Feedback Resistors close to device
10 mil gap
U1
S
FB BP D S S S Output Filter Capacitor
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