AL460
Full HD FIFO Memory
Datasheet
Version 1.2
©2007~2010 by AverLogic Technologies, Corp.
INFORMAT ION FURNISHED BY AVERLOGIC IS BELIEVED T O BE ACCURAT E AND RELIABLE. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY AVERLOGIC FOR ITS USE, NOR FOR ANY INFRINGEMENTS OF PATENTS OR OTHER RIGHTS OF THIRD P A R T I E S T H A T M A Y R E S U L T F R O M I T S U S E.N O L I C E N S E I S G R A N T E D B Y I M P L I C A T I O N O R O T H E R W I S E U N D E R A N Y P A T E N T O R P A T E N T R I G H T S OF AVERLOGIC.
Doc Number: 1-D-PMK262-0001
Amendments
Revise Date Contents Page
0.01
version
2008.07.01 Preliminary
2009.06.04 Revised Reference design schematic: XIN = 14.31818 MHz;
CSEL[1:0] = VDD33
2009.08.06 Revised Pin definitions: Pin 98 = ROINV; Pin 99 =ROEN.
2010.03.12 Update DC and AC Characteristics
Description
Pin
2010.09.30 Correct
Disclaimer
THE CONTENTS OF THIS DOCUMENT ARE SUBJECT TO CHANGE WITHOUT NOTICE. AVERLOGIC TECHNOLOGIES RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. AVERLOGIC DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. CUSTOMERS ARE ADVISED TO CONSULT WITH AVERLOGIC OR ITS COMMERCIAL DISTRIBUTORS BEFORE ORDERING.
Table of Contents
1GENERAL DESCRIPTION__________________________________________________4 2FEATURES_______________________________________________________________4 3APPLICATIONS___________________________________________________________5 4FUNCTION BLOCK DIAGRAM_____________________________________________5 5ORDERING INFORMATION________________________________________________6 6PIN DIAGRAM____________________________________________________________6
6.1Pin Description____________________________________________________________________6
6.2Pin Diagram______________________________________________________________________9 7ELECTRICAL CHARACTERISTICS________________________________________10
7.1Absolute Maximum Ratings under Free-Air Temperature_________________________10
7.2Recommended Operating Conditions_____________________________________________10
7.3DC Characteristics_______________________________________________________________10
7.4AC Characteristics_______________________________________________________________11
7.5Timing Diagrams_________________________________________________________________13 8FUNCTION DESCRIPTION_______________________________________________20
8.1Power-On-Reset & Initialization__________________________________________________20
跟刀架8.2WRST, RRST Reset Operation____________________________________________________21
8.3Control Signals Polarity Select___________________________________________________21台历
打孔机 8.4FIFO Write Operation____________________________________________________________21
8.5FIFO Read Operation_____________________________________________________________22 9APPLICATION NOTE_____________________________________________________24
9.1One Field Delay Line (The Old Data Read)________________________________________24
9.2Two Frame Mode_________________________________________________________________25 10Mechanical Drawing – 128-PIN LQFP____________________________________27
10.114x14x1.4mm 128-Pin LQFP Package_________________________________________27 11DESIGN NOTES_________________________________________________________29
11.1The AL460 Reference Schematic_______________________________________________29
11.2General PCB Design Guideline_________________________________________________30
1 GENERAL DESCRIPTION
The AL460 consists of 128 Mbits of memory density and can be configured as an 8M x 16-bit FIFO (first in first out) with a maximum R/W operating speed of 150 MHz. The full HD FIFO can be used in a wide range of applications such as multimedia, video capture systems and many other varieties of video data buffering applications. The size and high-speed data access allow full HD video frame capture up to 1080p resolutions.
The AverLogic AL460 FIFO memory provides completely independent input and output ports. The built-in address and pointer control circuits provide a straightforward bus interface to sequentially read/write memory, reducing inter-chip design efforts.
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The AL460 uses high performance process technologies with extended controller functions (write mask, read skip etc.); it allows easy operation of non-linearity FIFO read/write for use in broadcasting systems, security systems, cameras and many other applications. The AL460 is designed and manufactured using state-of-the-art technologies with low power consumption AC characteristics (2.5V & 3.3V power supply) facilitating high performance and high quality applications.
The chip is available in LQFP 128-pin with exposed die pad package; the small footprint allows product designers to keep board real estate to a minimum.
2 FEATURES
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设备• 128-Mbit density, 8M x 16-bit configuration • Supports video NTSC, PAL and HDTV up
to 1080p resolution • Independent 16-bit read/write operations
(different I/O data rates acceptable) at a maximum speed of 150 MHz • High speed synchronous sequential access • Input/Output enable control
银
触点标准
• Polarity Selectable • 2.5V& 3.3V power supply
• Standard 128-pin LQFP with exposed
die pad package
钢套箱1080p video data stream buffering The internal structure of each AL460 consists of Input/Output buffers, Write Data Registers, Read Data Registers and main 8M x 16-bit memory cell array and state-of-the-art logic design that takes care of addressing and controlling the read/write data.
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