Ali M3101D DVB-T Platform Design Guide

M3101D DVB-T Platform Design Guide Version 3.0

2009-1-15

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consent of ALi Corporation.

ALi Corporation

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Revision History

Version Date Revision By

1.0 2006-06-13 Initial version Hugan

2.0 2008-4-2 Updated for M3101C Tom Tian

3.0 2009-1-14 Updated for M3101D Tom Tian

CONTENTS

1Introduction (4)

1.1About This Design Guide (4)

1.1System Overview (4)

1.1.1General Features (4)

1.1.2CPU Related Features (4)

1.1.3Memory and bus interfaces (4)

1.1.4Peripherals (4)

1.1.5System Application Diagram (5)

2Baseboard Requirements (6)

2.1Platform Stack-Up (6)

2.2Motherboard Layout (Pads and Vias) (6)

2.3Platform Component Placement (6)

3System Memory Guidelines (8)

3.1SDRAM Layout Guidelines (8)

3.2Memory Bus Topologies (8)

3.3System Memory Routing Example (9)

4RF Tuner Guideline (10)

4.1Power and Ground (10)

4.2IF filter (10)

4.3IF AGC & RF AGC Traces (10)

4.4IF Differential Output Pairs, I+ & I- (10)

4.5IF layout example (10)

5System clock and PLL guideline (11)

5.1Clock and PLL power (11)

5.2External Crystal Selection (11)

5.3M3101D Crystal Requirement (11)

5.4PLL/External Crystal layout (12)

6A/V Part Guideline (13)

6.1Design Considerations for Audio Quality (13)

6.2Design Considerations for Video Quality (15)

7SCART Audio and Video Switcher (17)

7.1SCART control circuit reference (17)flag标签抗体

7.2SCART control logic (18)

7.3SCART connect pin function (19)

8USB Guideline (20)

8.1Power and Ground (20)

8.2DP&DM Differential Output Pairs (21)

9ANT Power Supply and Auto Overload pretection Circuits (22)

10Layout/Routing Guidelines (23)cofdm

10.1Return Path (23)

10.2Decoupling Theory (23)

natr-24110.3General Routing and Placement (23)

11System Design Considerations (25)

11.1Debug Port (25)

11.2EMI Design Considerations (25)线切

11.3Brief EMI Theory (25)

11.4Some Recommended Solution (25)

11.5Resistor Summary (25)

11.6GPIO MAPPING (27)

12Platform Power Delivery Guidelines (28)

家用玉米脱粒机12.1M3101D Delivery Guidelines (28)

12.1.1 1.2V/3.3V Power Sequencing (28)

12.1.2M3101D Decoupling (28)

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12.1.3Power Bus/Plane Layout Guideline (29)

12.2M3101D Power Requirements (29)

12.3M3101D Main Board’s Power Distribution (29)

12.4M3101D Power Consumption (29)

13Layout Checklist (30)

13.1Memory Interface (30)

13.2TV Encoder (30)

13.3Tuner & COFDM (30)

13.4Power/Ground Decoupling and Delivery (31)

13.5PLL Pin Checklist (31)

13.6USB Interface Checklist (31)

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