The information in this document is subject to change without notice.
Document No. EN0417EJ1V0DS00 (1st edition)Date Published January 1999 P Printed in Japan
DATA SHEET
1999
©
STRUCTURE AND FUNCTIONS
带外
衰减A color TFT (thin film transistor) LCD module is comprised of a TFT liquid crystal panel structure, LSIs for driving the TFT array, and a backlight assembly. The TFT panel structure is created by sandwiching liquid crystal material in the narrow gap between a TFT array glass substrate and a color filter glass substrate. After the driver LSIs are connected to the panel, the backlight assembly is attached to the backside of the panel.RGB (red, green, blue) data signals from a source system is modulated into a form suitable for active matrix addressing by the onboard signal processor and sent to the driver LSIs which in turn addresses the individual TFT cells.
Acting as an electro-optical switch, each TFT cell regulates light transmission from the backlight assembly when activated by the data source. By regulating the amount of light passing through the array of red, green, and blue dots, color images are created with clarity.
BLOCK DIAGRAM
V
GNDB
GND
Note Frame is not connected to GND nor GNDB.
2Data Sheet EN0417EJ1V0DS00
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Data Sheet EN0417EJ1V0DS00
OUTLINE OF CHARACTERISTICS (at room temperature)
Display area 304.128 (H) × 228.096 (V) mm Drive system a-Si TFT active matrix Display colors Full-color Number of pixels 1024 × 768Pixel arrangement RGB vertical stripe Pixel pitch 0.297 (H) × 0.297 (V) mm
Module size 350.0 (H) × 265.0 (V) × 23.0 (D) mm (typ.)Weight 1480 g (typ.)
Contrast ratio
150:1 (typ., perpendicular)
Viewing angle (more than the contrast ratio of 10:1)
• Horizontal: 85° (typ., left side, right side)• Vertical
: 85° (typ., up side, down side)
Optimum grayscale perpendicular (γ = 2.2)Polarizer pencil-hardness 3H (min., JISK5400)
Color gamut 48 % (typ., At center, To NTSC)Response time 44 ms (typ.), “black” to “white”Luminance 180 cd/m 2
(typ.)
Input signals Analog RGB, Vsync and HS
Backlight
Edge light type: Four cold cathode fluorescent lamps with an inverter <Replacement parts>Inverter
P/N: 150PW011
Lamp holder set P/N: 150LHS01Supply voltage 12 V (typ.), 12 V (typ.)Power consumption
24.7 W (typ.)
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Data Sheet EN0417EJ1V0DS00
GENERAL SPECIFICATIONS
Item
Contents
Unit Module size 350.0 ± 0.6 (H) × 265.0 ± 0.6 (V) × 24.0 (max.) (D)
mm Display area 304.128 (H) × 228.096 (V)mm Number of dots 1024 × 3 (H) × 768 (V)dots Pixel pitch 0.297 (H) × 0.297 (V)mm Dot pitch
0.099 (H) × 0.297 (V)
mm Pixel arrangement RGB (Red, Green, Blue) vertical stripe
–Display colors Full color
color Weight
1,480 (typ.), 1600 (max.)
g
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol Rating Unit Remarks V DD –0.3 to + 14V Supply voltage
–0.3 to + 14V Ta = 25°C
Logic input voltage V IN 1–0.3 to + 5.5V R, G, B input voltage V IN 2–6.0 to + 6.0V CLK input voltage V IN 3–7.0 to + 7.0V Ta = 25°C V DD = 12 V Storage temp.T ST –20 to + 60°C –
Operating temp.T OP
0 to 50
°C
Module surface Note 1
≤ 95% relative humidity Ta ≤ 40°C ≤ 85% relative humidity
40 < Ta ≤ 50°C Humidity
(no condensation)
Absolute humidity shall not exceed Ta = 50°C,
85% relative humidity level.
Ta > 50°C
柱面投影
Notes 1.Measured at the LCD panel (Include own fever) 2.No condensation
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Data Sheet EN0417EJ1V0DS00
ELECTRICAL CHARACTERISTICS (1)Logic, LCD driving, Backlight
(Ta = 25°C)
Item
Symbol Min.Typ.Max.Unit Remarks
V DD 11.412.012.6V Logic and LCD driving Supply voltage
V DD B
11.412.012.6V Backlight
Logic input “L” voltage V iL 0–0.8V Logic input “H” voltage V iH 2.2– 5.25V HS/CS, Vsync, SEL, UP, DOWN,RESET, VOLSEL, DDCCLK,DDCDAT, OSDSEL, WPRT Logic output “L” voltage VOL1––0.4V Logic output “H” voltage VOH1 2.4––V
LED00/01/02/10/11/12
Logic input “L” current 1I iL1–1––µA Logic input “H” current 1I iH1––1µA HS/CS, Vsync
Logic output “L” current 1I oL1––1µA Logic output “H” current 1I oH1–1––µA DDCDAT
–660850mA V DD = 12.0 V Note1
I DD
–
45
65
mA
Power saving mode V DD = 12.0 V Note1
–14001600mA
V DD B = 12.0 V (Max. luminance)Supply current
(Dot-checked pattern)
I DD B –110mA
Power saving mode V DD B = 12.0 V
Note Pixel checkered pattern (2)Video signal (R, G, B) input
(Ta = 25°C)
Item
Min.Typ.Max.Unit Remarks
Maximum amplitude (white - black)
0(black)0.7(white)*A
Vp-p
Note
DC input level (black)−0.5–+2.5V –
0.2
*B
Vp-p
G terminal
(sync on green)
*A + *B
–– 1.1Vp-p
茶籽粉Note Need to adjust contrast if the input level is beyond 0.7 Vp-p.
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Data Sheet EN0417EJ1V0DS00
POWER SUPPLY DESIGN
(1)Ripple voltage of the supply voltage
Please note that the ripple at the input connector of the module should be within the values shown in this table.If the ripple would be beyond these values, the noise might appear on the screen.
Note The acceptable range of ripple voltage includes spike noises.Example of the power supply connection to minimize the ripple voltage
a) Separate the power supply
b) Put the filter
V DD V DD B
V DD
V DD B
(2)Current wave in the luminance control mode
In the luminance control mode, the rush current below flows into the inverter of the module. The duty cycle varies from 100% through 20% depending on the luminance control level. This might cause the noise on the screen. Please evaluate the appropriate value of the capacitor in the filter to eliminate the noise.
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