发明人:今 啓充,大湊 毅,山崎 其一,松原 直弘,成瀬 郷申请号:JP2012043306
申请日:20120229
公开号:JP5918568B2
公开日:
20160518
摘要:PROBLEM TO BE SOLVED: To provide a logic module that has more paths available for logic elements in the logic module than before.SOLUTION: The logic module includes: programmable FPGAs 101, 102; connectors 105, 106, 107, 108 for external connection connected to the FPGAs 101, 102; connection switch circuits 103, 104 each capable of switching two wires interconnecting the FPGAs 101, 102 between a straight connection and a cross connection; and a switching control signal generation circuit 340 for generating switching control signals to switch the connection switch circuits 103, 104 alternately between the straight connection and the cross connection on the basis of a clock pertinent to a common logic operating frequency of the FPGAs 101, 102.
申请人:株式会社日立情報通信エンジニアリング
地址:神奈川県横浜市西区みなとみらい二丁目3番3号 国籍:JP
代理人:田中 清,村山 みどり