1/19
XC61C ETR0201_004
■GENERAL DESCRIPTION
The XC61C series are highly precise, low power consumption voltage detectors, manufactured using CMOS and laser trimming technologies.
Detect voltage is extremely accurate with minimal temperature drift.
Both CMOS and N-channel open drain output
configurations are available.
■APPLICATIONS
●Microprocessor reset circuitry ●Memory battery back-up circuits ●Power-on reset circuits ●Power failure detection
●System battery life and charge voltage monitors
■TYPICAL PERFORMANCE CHARACTERISTICS
■FEATURES
Highly Accurate : ± 2% (Low Voltage VD: 0.8V~1.5V) (Standard Voltage VD: 1.6V~6.0V) ± 1% (Standard Voltage VD: 2.6V~5.0V) Low Power Consumption : 0.7μA (TYP .) [V IN =1.5V] Detect Voltage Range :0.8V ~ 6.0V in 100mV increments Operating Voltage Range :0.7V ~ 6.0V (Low Voltage)
0.7V ～10.0V (Standard Voltage) Detect Voltage Temperature Characteristics
: ±100ppm/℃ (TYP .) @Ta=25 O C Output Configuration : N-channel open drain or CMOS Ultra Small Packages : SSOT-24 (150mW)
SOT-23 (250mW) SOT-25 (250mW) SOT-89 (500mW) TO-92 (300mW) USP-6B (100mW) USP-6C (100mW)
USP-4 (120mW)
◆CMOS
◆Highly Accurate:±1% (V DF =2.6V~5.0V) ±2% (V DF =0.8V~6.0V) ◆Low Power Consumption: 0.7μA
(V IN =1.5V)
■TYPICAL APPLICATION CIRCUITS
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XC61C Series
1 V SS
2 NC
3 V OUT
NC 6
V
IN
5NC 4
PIN NUMBER
SSOT-24 SOT-23 SOT-25 SOT-89 TO-92 (T)TO-92 (L)USP-6B USP-6C
USP-4
PIN NAME
FUNCTION
2 3 2 2 2 1 5 5 4 V IN
Supply Voltage t I t
www.ppm4 2 3 3 3 2 1 1 2 V SS Ground 1 1 1 1 1 3 3 3 1 V OUT Output 3 - 4,
5 - - - 2,4,
6 2,4,6 3 NC No Connection
DESIGNATOR
DESCRIPTION
SYMBOL
DESCRIPTION
C
: CMOS output
① Output Configuration
N
: N-ch open drain output : e.g.0.9V → ②0, ③9
② ③
Detect Voltage
08 ~ 60
: e.g.1.5V → ②1, ③5
④ Output Delay 0 : No delay
1 : Within ±1%
⑤ Detect Accuracy
2 : Within ±2% N : SSOT-24 (SC-82) M : SOT-2
3 P : SOT-89 S : SOT-25
T : TO-92 (Standard) L : TO-92 (Custom pin configuration) D : USP-6B E : USP-6C ⑥ Package
G : USP-4 R : Embossed tape, standard feed L : Embossed tape, reverse feed
H : Paper type (TO-92) ⑦ Device Orientation
B : Bag (TO-92)
■PIN CONFIGURATION
■PIN ASSIGNMENT
■PRODUCT CLASSIFICATION
●Ordering Information
XC61C ①②③④⑤⑥⑦ *Please use the circuit without connecting
the heat dissipation pad. If the pad needs to be connected to other pins, it should be connected to the V IN pin.
USP-6C (BOTTOM VIEW)
IN
V SS V OUT USP-4
（BOTTOM VIEW ） SOT-25 (TOP VIEW)
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XC61C
Series
■PACKAGING INFORMATION
●SSOT-24 (SC-82)
●SOT-23
●SOT-25
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XC61C Series
●
SOT-89
●TO-92
■PACKAGING INFORMATION (Continued)
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XC61C
Series
●USP-6C
■PACKAGING INFORMATION (Continued)
●USP-4
* Soldering fillet surface is not formed because the sides of the pins are plated.
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XC61C Series
MARK CONFIGURATION VOLTAGE (V)
A CMOS 0.X
B CMOS 1.X
C CMOS 2.X
D CMOS 3.X
E CMOS 4.X
F CMOS 5.X H CMOS 6.X
MARK CONFIGURATION VOLTAGE (V)
K N-ch 0.X L N-ch 1.X M N-ch 2.X N N-ch 3.X P N-ch 4.X R N-ch 5.X S N-ch 6.X
MARK VOLTAGE (V)MARK VOLTAGE (V)0 X.0 5 X.5 1 X.1 6 X.6 2 X.2 7 X.7 3 X.3 8 X.8 4 X.4 9 X.9
MARK
DELAY TIME
PRODUCT SERIES
3 No Delay Time XC61Cxxx0xxx
① Represents integer of detect voltage and CMOS Output (XC61CC series)
■MARKING RULE
● SSOT-24, SOT-23, SOT-25,
SOT-89, USP-4
①
②
④
12
3
4
①
②
③④
12
3
④
③
②①
1
23
N-Channel Open Drain Output (XC61CN series)
②Represents decimal number of detect voltage
③Represents delay time (Except for SSOT-24)
④Represents production lot number
Based on the internal standard. (G, I, J, O, Q, W excepted)
USP-4 (TOP VIEW)
①
②
③④
12
3
5
4
SOT-25
(TOP VIEW)
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