CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.Pinout
CD4067BMS TOP VIEW
CD4097BMS TOP VIEW
1
tf2o234567891011
12
COMMON OUT/IN 76543210A B VSS 161718192021222324151413VDD 910111214INHIBIT C D
81315**
*CHANNEL
IN/OUT
1
234
56789101112
COMMON X
76543210A B VSS 161718192021222324151413VDD 1234
COMMON Y
7C INHIBIT
05
6CHANNEL X
Y CHANNEL
OUT/IN IN/OUT
OUT/IN IN/OUT
Y CHANNEL IN/OUT Features
•High Voltage Types (20V Rating)
•CD4067BMS Single 16 Channel Multiplexer/Demultiplexer •CD4097BMS Differential 8 Channel Multiplexer/Demulti-plexer •Low ON Resistance: 125Ω (typ) Over 15Vp-p Signal Input Range for VDD - VSS = 15V
•High OFF Resistance: Channel Leakage of ±10pA (typ)at VDD - VSS = 18V
•Matched Switch Characteristics: RON = 5Ω (typ) for VDD - VSS = 15V •Very Low Quiescent Power Dissipation Under All Digi-tal Control Input and Supply Conditions: 0.2µW (typ)at VDD - VSS = 10V •Binary Address Decoding on Chip •5V, 10V and 15V Parametric Ratings •100% Tested for Quiescent Current at 20V
•Maximum Input Current of 1µA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and +25o C •Standardized Symmetrical Output Characteristics
Applications
•Analog and Digital Multiplexing and Demultiplexing •A/D and D/A Conversion •Signal Gating
*When these devices are used as demultiplexers the “CHANNEL IN/OUT” terminals are the outputs and the “COMMON OUT/IN” ter-minals are the inputs.
Description
CD4067BMS and CD4097BMS CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON Impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range.
The CD4067BMS is a 16 channel multiplexer with four binary control inputs, A, B, C, D and an inhibit input, arranged so that any combination of the inputs selects one switch.
The CD4097BMS is a differential 8 channel multiplexer having three binary control inputs A, B, C and an inhibit input. The inputs permit selection of one of eight pairs of switches. A logic “1”present at the inhibit input turns all channels off.
The CD4067BMS and CD4097BMS are supplied in these 24lead outline packages:Braze Seal DIP *H4V †H6M Frit Seal DIP
*H1Z †HFN Ceramic Flatpack *H4P †H4P *CD4067B Only
†CD4097B
December 1992
CD4067BMS CD4097BMS
CMOS Analog
Multiplexers/Demultiplexers
File Number
3190
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . .-0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range. . . . . . . . . . . . . . . .-55o C to +125o C Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . .-65o C to +150o C Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .+265o C At Distance 1/16 ± 1/32 Inch (1.59mm± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . .θjaθjc Ceramic DIP and FRIT Package. . . . .80o C/W20o C/W Flatpack Package . . . . . . . . . . . . . . . .70o C/W20o C/W Maximum Package Power Dissipation (PD) at +125o C
For TA = -55o C to +100o C (Package Type D, F, K). . . . . .500mW For TA = +100o C to +125o C (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/o C to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175o C
TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND1+25o C-10µA
ssbvsc92+125o C-1000µA
VDD = 18V, VIN = VDD or GND3-55o C-10µA Input Leakage Current IIL VIN = VDD or GND VDD = 201+25o C-100-nA
2+125o C-1000-nA
VDD = 18V3-55o C-100-nA Input Leakage Current IIH VIN = VDD or GND VDD = 201+25o C-100nA
2+125o C-1000nA
VDD = 18V3-55o C-100nA
ON-State Resistance RL = 10K Returned to VDD - VSS/2RON VDD = 5V
VIS = VSS to VDD
1+25o C-1050Ω
2+125o C-1300Ω
3-55o C-800ΩVDD = 10V
VIS = VSS to VDD
1+25o C-400Ω
2+125o C-500Ω
3-55o C-310ΩVDD = 15V
VIS = VSS to VDD
1+25o C-240Ω
2+125o C-320Ω
3-55o C-220Ω
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA1+25o C-2.8-0.7V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA1+25o C0.7 2.8V
Functional (Note 4)F VDD = 2.8V, VIN = VDD or GND7+25o C VOH >
VDD/2VOL <
VDD/2
V
VDD = 20V, VIN = VDD or GND7+25o C VDD = 18V, VIN = VDD or GND8A+125o C VDD = 3V, VIN = VDD or GND8B-55o C
Input Voltage Low (Note 2)VIL VDD = 5V = VIS Thru 1K
VEE = VSS
RL = 1K to VSS
|ISS| < 2µA on all
OFF Channels
1, 2, 3+25o C, +125o C, -55o C- 1.5V
Input Voltage High
(Note 2)
油砂
VIH1, 2, 3+25o C, +125o C, -55o C 3.5-V
Input Voltage Low (Note 2)VIL VDD = 15V = VIS Thru 1K
VEE = VSS
RL = 1K to VSS
|ISS| < 2µA on all
OFF Channels
1, 2, 3+25o C, +125o C, -55o C-4V
Input Voltage High
(Note 2)
VIH1, 2, 3+25o C, +125o C, -55o C11-V
OFF Channel Leakage Any Channel OFF or All Channels OFF (Common OUT/IN)IOZL VOUT = 0V VDD = 20V1+25o C-0.1-µA
2+125o C-1.0-µA
VDD = 18V3 -55o C-0.1-µA IOZH VOUT = VDD VDD = 20V1+25o C-0.1µA
2+125o C- 1.0µA
VDD = 18V3 -55o C-0.1µA
NOTES: 1.All voltages referenced to device GND, 100% testing being implemented.
2.Go/No Go test with limits applied to inputs.
3.For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
4.VDD = 2.8/3.0V, RL = 200K
VDD = 20V/18V, RL = 10K - 25K
TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Propagation Delay (Signal In to Output)TPHL
TPLH
VDD = 5V, VIN = VDD or GND
(Notes 1, 2)
9+25o C-60ns
10, 11+125o C, -55o C-81ns
Propagation Delay Address or Inhibit to Signal Out. (Channel Turning On)TPZH
TPZL
VDD = 5V, VIN = VDD or GND
(Notes 2, 3)
9+25o C-650ns
10, 11+125o C, -55o C-878ns
NOTES:
1.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2.-55o C and +125o C limits guaranteed, 100% testing being implemented.
3.CL = 50pF, RL = 10K, Input TR, TF < 20ns.
TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND1, 2-55o C, +25o C-5µA
+125o C-150µA
VDD = 10V, VIN = VDD or GND1, 2-55o C, +25o C-10µA
+125o C-300µA
VDD = 15V, VIN = VDD or GND1, 2-55o C, +25o C-10µA
+125o C-600µA
Input Voltage Low VIL VDD = VIS = 10V
VEE = VSS
RL = 1K to VSS
IIS < 2µA
ON OFF Channel 1, 2+25o C, +125o C,
-
55o C
-3V
Input Voltage High VIH1, 2+25o C, +125o C,
-55o C
+7-V
Propagation Delay Address or Inhibit to Signal Out. (Channel Turning On)TPZH
TPZL
VDD = 10V1, 2, 4+25o C-270ns VDD = 15V1, 2, 4+25o C-190ns
Propagation Delay Signal In to Output TPHL
TPLH
VDD = 10V VIS = VDD or
GND
枳橙1, 2, 3+25o C-30ns VDD = 15V1, 2, 3+25o C-20ns TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Propagation Delay Address or Inhibit to Signal Out
(Channel Turning Off)TPHZ TPLZ
VDD = 5V 1, 2, 5+25o C -440ns VDD = 10V 1, 2, 5+25o C -180ns VDD = 15V
1, 2, 5+25o C -130ns Input Capacitance CIN
Any Address or Inhibit
1, 2
+25o C
-7.5
pF
NOTES:
1.All voltages referenced to device GND.
2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.
3.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4.CL = 50pF, RL = 10K, Input TR, TF < 20ns.
5.CL = 50pF, RL = 300Ω, Input TR, TF < 20ns.
TABLE 4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS
NOTES TEMPERATURE
LIMITS
UNITS MIN MAX Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4+25o C -25µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4+25o C -2.8-0.2V N Threshold Voltage Delta
∆VTN VDD = 10V, ISS = -10µA 1, 4+25o C -±1V P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4+25o C 0.2 2.8V P Threshold Voltage Delta ∆VTP VSS = 0V, IDD = 10µA
1, 4+25o C -±1V Functional
F
风扇转速测试
VDD = 18V, VIN = VDD or GND 1
+25o C
VOH >VDD/2VOL <VDD/2V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL TPLH
VDD = 5V
1, 2, 3, 4
+25o C
- 1.35 x +25o C Limit
ns
NOTES: 1.All voltages referenced to device GND.
2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3.See Table 2 for +25o C limit.
4.Read and Record
TABLE 5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25O C PARAMETER
SYMBOL DELTA LIMIT
Supply Current - MSI-2IDD ± 1.0µA
ON Resistance
RONDEL10
± 20% x Pre-Test Reading
TABLE 6.APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS
READ AND RECORD Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A, RONDEL10Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A, RONDEL10Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A, RONDEL10
PDA (Note 1)
100% 50041, 7, 9, Deltas
Interim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A, RONDEL10
PDA (Note 1)100% 50041, 7, 9, Deltas Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
TABLE 3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS
能量传送器
NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Group A Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11Group B
Subgroup B-5Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6
Sample 50051, 7, 9Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
Subgroups 1, 2 3
NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7.TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883METHOD
TEST
READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD
POST-IRRAD Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8.BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
OSCILLATOR
50kHz
25kHz
PART NUMBER CD4067BMS Static Burn-In 1 Note 11 2 - 2324Static Burn-In 2 Note 1112 2 - 11, 13 - 24
Dynamic Burn-In Note 1-12, 15241
2 - 9, 16 - 23
10, 11, 13, 14(Note 3)
Irradiation Note 2
1
12
2 - 11, 1
3 - 24
PART NUMBER CD4097BMS Static Burn-In 1 Note 11, 17 2 - 16, 18 - 23
24Static Burn-In 2 Note 11, 1712 2 - 11, 13 - 16,
18 - 24
Dynamic Burn-In Note 1-12, 13241, 17
2 - 9, 15, 16,18 - 23
10, 11, 14(Note 4)
Irradiation Note 21, 17
12
2 - 11, 1
3 - 16,
18 - 24
NOTE:
1.Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2.Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,VDD = 10V ± 0.5V
3.Pin 10 is at 14kHz, Pin 11 is at 7kHz, Pin 13 is at 1.7kHz, Pin 14 is at 3.5kHz
4.Pin 10 is at 14kHz, Pin 11 is at 7kHz, Pin 14 is at 3.5kHZ
TABLE 6.APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS READ AND RECORD
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