NL128102AC23-02A中文资料

Document No.  EN0427EJ1V0DS00 (1st edition) Date Published  February  1999 P
Printed in Japan DATA  SHEET
1999
©
STRUCTURE  AND  FUNCTIONS
A color TFT (thin film transistor) LCD module is comprised of a TFT liquid crystal panel structure, LSIs for driving the TFT array, and a backlight assembly.  The TFT panel structure is created by sandwiching liquid crystal material in the narrow gap between a TFT array glass substrate and a color filter glass substrate.  After the driver LSIs are connected to the panel, the backlight assembly is attached to the backside of the panel.
RGB (red, green, blue) data signals from a source system is modulated into a form suitable for active matrix addressing by the onboard signal processor and sent to the driver LSIs which in turn addresses the individual TFT cells.
Acting as an electro-optical switch, each TFT cell regulates light transmission from the backlight assembly when activated by the data source.  By regulating the amount of light passing through the array of red, green, and blue dots, color images are created with clarity.
BLOCK  DIAGRAM
V DD
(+12 V)
V DD
Note Neither GND nor GNDB is connected to Frame.
2
Data Sheet  EN0427EJ1V0DS00
OUTLINE  OF  CHARACTERISTICS  (at room temperature)
Display area305.28 (H) × 244.224 (V) mm
Drive system a-Si TFT active matrix
Display colors Full-color
Number of pixels1280 × 1024 pixels
Pixel arrangement RGB vertical stripe
Pixel pitch0.2385 (H) × 0.2385 (V) mm
Module size350.0 (H) × 284.8 (V) × 26.0 (max.) (D) mm
Weight1700 g (TYP.)
Contrast ratio200 : 1 (TYP.)
Viewing angle (more than the contrast ratio of 10 : 1)
Horizontal:  60° (TYP., left side, right side)
Vertical:  50° (TYP., up side), 45° (TYP., down side) Color gamut59% (TYP., at center, to NTSC)
Response time7 ms (TYP.), white to black
发糕机Luminance200 cd/m2 (TYP.)
Signal system Analog RGB signals, Synchronous signals (Hsync and Vsync or Composite),
CLK
Supply voltages12 V (Logic/LCD driving), 12 V (Backlight)
Backlight Edge light type:Four cold cathode fluorescent lamps with an inverter
[Replaceable parts]
•  Lamp holder:  type No. 154LHS02
•  Inverter:  type No. 154PW021
Power consumption28.8 W (TYP.)
Data Sheet  EN0427EJ1V0DS003
GENERAL  SPECIFICATIONS
Item Specification Unit Module size350.0 ± 0.6 (H) × 284.8 ± 0.6 (V) × 26.0 (MAX.) (D)mm Display ar
ea305.28 (H) × 244.224 (V)mm Number of dots1280 × 3 (H) × 1024 (V)dot Number of pixels1280 (H) × 1024 (V)pixel Dot pitch0.0795 (H) × 0.2385 (V)mm Pixel pitch0.2385 (H) × 0.2385 (V)mm Pixel arrangement RGB (Red, Green, Blue) vertical stripe–Display colors full color color Weight1760 (MAX.)g
ABSOLUTE  MAXIMUM  RATINGS
Parameter Symbol Rating Unit Remarks
V DD–0.3 to +14V
Supply voltage
V DD B–0.3 to +14V
T a = 25°C
Logic input voltage V IN1–0.3 to +5.5V R,G,B input voltage V IN2–6.0 to +6.0V CLK input voltage V IN3–7.0 to +7.0V T a = 25°C V DD = 12 V
Storage temp.T ST–20 to + 60°C–
Operating temp.T OP0 to +50°C Module surface Note ≤ 95% relative humidity T a≤ 40°C
≤ 85% relative humidity40<T a≤50°C
Humidity
Absolute humidity shall not exceed T a = 50°C, 85% relative humidity level.T a > 50°C
No condensation
Note Measured at the LCD panelwww.621mm
Data Sheet  EN0427EJ1V0DS00 4
Data Sheet  EN0427EJ1V0DS00
5
ELECTRICAL  CHARACTERISTICS (1)Logic, LCD driving, Backlight
T a  = 25°C
Parameter
Symbol MIN.TYP.MAX.Unit Remarks
V DD B 11.412.012.6V for backlight
Supply voltage
V DD
11.412.012.6V for logic and LCD driving
Logic input Low voltage V IL 0–0.8V Logic input High voltage
V IH
2.0
5.25
V
Hsync/Csync, Vsync, SEL, UP,DOWN, EXIT, VOLSEL, DDCDAT,DDCCLK, OSDSEL, WPRT,MENUSEL Logic output Low voltage V OL ––0.4V Logic output High voltage V OH    2.4––V
DDCDAT
Logic input Low current 1I iL1–1––µA Logic input High current 1I iH1––1µA Hsync/Csync, Vsync
Logic input Low current 2I iL2––1µA Logic input High current 2I iH2–1––µA DDCDAT
1000
1500
mA
for LCD driving V DD  = 12.0 V
Note
I DD
–5065mA
Power saving mode, V DD  = 12.0 V
Note –14001600mA
for back light V DD B = 12.0 V
Supply current
I DD B –110mA
Power saving mode, V DD B = 12.0 V
Note Pixel checkered pattern (2)Video signal (R,G,B) input
T a  = 25°C
Item
MIN.TYP.MAX.Unit Remarks
Maximum amplitude (white - black)
0(black)0.7(white)*A
Vp-p
Need to adjust contrast if input more 0.7 Vp-p
DC input level (black)–0.5–+2.5V –
Sync. level
0.2
0.3
*B
Vp-p
G terminal
(Sync. On Green)
*A + *B ––  1.1Vp-pnatr-241
Data Sheet  EN0427EJ1V0DS00
6
POWER  SUPPLY  DESIGN
(1)Please note that the supply voltage must not be applied while the control signals (SEL, UP, DOWN, EXIT,
BRT+ and BRT–) are connected to GND. Otherwise the module may cause malfunction.
(2)If the power supply voltage is applied while UP and DOWN are connected to GND, the input control signals
become ineffective. In this case, please turn off the power once and turn on the power while UP and DOWN are connected to GND again.(3)Inverter current wave
Inverter current wave is as follows.
反光雨衣1400 (mA)
0 (A)
Maximum luminance control: 100%Minimum luminance control: 20%
碳素纸Luminance control frequency
Input Vsync frequency × K Input Vsync frequency ≤ 75 Hz: K = 4.6Input Vsync frequency > 75 Hz: K = 3.6
=(4)Ripple of supply voltage
V DD
(for logic and LCD driver)
V DD B
(for backlight)Acceptable range
≤ 100 mVp-p
200 mVp-p
Remark The acceptable range of ripple voltage includes spike noise.Example of the power supply connection
a)  Separate the power supply
b)  Put the filter
V DD V DD B
V DD
V DD B

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