Low Charge Injection 8-Channel High Voltage
Analog Switches with Bleed Resistors
Features
❏HVCMOS ® technology for high performance ❏Very low quiescent power dissipation – 10µA ❏Output On-resistance typically 22 ohms ❏Integrated bleed resistors on the outputs ❏Low parasitic capacitances
❏DC to 10MHz analog signal frequency ❏-60dB typical output off isolation at 5MHz ❏CMOS logic circuitry for low power ❏Excellent noise immunity
❏On-chip shift register, latch and clear logic circuitry ❏
Flexible high voltage supplies
Block Diagram
D OUT
D IN
带隙基准
CLK
Applications
❏Medical ultrasound imaging ❏
Piezoelectric transducer drivers
General Description
The Supertex HV230 and HV232 are low charge injection 8-channel high-voltage analog switch integrated circuits (ICs) with bleed resistors. These devices can be used in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. The bleed resistors eliminate voltage built up on capacitive loads such as piezoelectric transducers.Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, Latch Enable Bar (LE) should be left high until all bits are clocked in. Using HVCMOS technology, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signal
s.
These ICs are suitable for various combinations of high voltage supplies, e.g., V PP /V NN : +50V/–150V, or +100V/–100V.
Absolute Maximum Ratings*
V DD Logic power supply voltage -0.5V to +15V
V PP - V NN Supply voltage 220V
V PP Positive high voltage supply -0.5V to V NN +200V
V NN Negative high voltage supply +0.5V to -200V Logic input voltages -0.5V to V DD +0.3V
Analog Signal Range
V NN to V PP
Peak analog signal current/channel 3.0A
Storage temperature -65°C to +150°C
Power dissipation:
28-lead PLCC 1.2W 48-lead TQFP 1.0W 26-lead TAPP 1.0W 26-lead µ-BGA
1.0W
*Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condi-tions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Symbol Parameter
Value
V DD Logic power supply voltage 1, 3 4.5V to 13.2V V PP Positive high voltage supply 1, 340V to V NN + 200V V NN Negative high voltage supply 1, 3-40V to -160V V IH High-level input voltage V DD -1.5V to V DD V IL Low-level input voltage
0V to 1.5V
V SIG Analog signal voltage peak to peak V NN +10V to V PP -10V 2T A
Operating free air-temperature
0°C to 70°C
Notes:
1Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.2V SIG must be V NN - V SIG - V PP or floating during power up/down transistion.
3Rise and fall times of power supplies V DD , V PP , and V NN should not be less than 1.0msec.
Operating Conditions *
Package Options
28-Lead plastic chip carrier 48-Lead TQFP 26-lead TAPP
26-lead µ-BGA Die HV232PJ
HV232FG
复合硅微粉
HV232X
HV230TA
--HV232GA
--
-V PP - V NN
200V 200V
HV230/232 Truth Table
D0D1D2D3D4D5D6D7LE CL SW0SW1SW2SW3SW4SW5SW6SW7
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
L L L OFF
H L L ON
X X X X X X X X H L HOLD PREVIOUS STATE
X X X X X X X X X H OFF OFF OFF OFF OFF OFF OFF OFF
Notes:起子头
1.The eight switches operate independently.
2.Serial data is clocked in on the L to H transition CLK.
3.The switches go to a state retaining their present condition at the rising edge of LE. When LE is
low the shift register data flows through the latch.
4.D OUT is high when data in shift register 7 is high.
5.Shift register clocking has no effect on the switch states if LE is H.
热熔胶
网膜6.The clear input overrides all other inputs.
DC Characteristics (over recommended operating conditions unless otherwise noted)
30263848I SIG = 5mA
V PP = 40V,25
222732I SIG = 200mA V NN = -160V
Small Signal Switch (ON)
R ONS
25222730Ω
I SIG = 5mA V PP = 100V,Resistance
18182427I SIG = 200mA V NN = -100V 23202530I SIG = 5mA
V PP = 160V,
22
162527I SIG = 200mA V NN = -40V Small Signal Switch (ON)∆R ONS 20
5.020
20
%I SW = 5mA, V PP = 100V,Resistance Matching V NN = -100V
Large Signal Switch (ON)R ONL 15
Ω
V SIG = V PP - 10V, I SIG = 1A Resistance
Output Switch Shunt R INT 20
3550K Ω
Output switch to R GND Resistance I RINT = 0.5mA Switch Off Leakage I SOL
5.0 1.01015µA V SIG = V PP - 10V Per Switch
DC Offset Switch Off 300100300300mV No Load DC Offset Switch On 500
100500500
mV No Load Pos. HV Supply Current I PPQ 1050µA ALL SWs OFF Neg. HV Supply Current I NNQ -10-50µA ALL SWs OFF
Pos. HV Supply Current I PPQ 1050µA ALL SWs ON, I SW = 5mA Neg. HV Supply Current I NNQ
-10
-50µA ALL SWs ON, I SW = 5mA Switch Output 3.0
3.0
2.0 2.0A V SIG duty cycle - 0.1%Peak Current
Output Switch Frequency
f SW
50KHz
Duty Cycle = 50%6.5
7.08.0V PP = 40V,V NN = -160V
I PP Supply Current
I PP
4.0
5.0 5.5mA
V PP = 100V,V NN = -100V 4.0 5.0 5.5V PP = 160V,V NN = -40V 6.5
7.08.0V PP = 40V,V NN = -160V
I NN Supply Current
I NN
4.0
5.0 5.5mA
V PP = 100V,V NN = -100V 4.0
5.0 5.5V PP = 160V,V NN = -40V
Logic Supply I DD 4.0 4.0 4.0mA f CLK = 5MHz, V DD = 5.0V
Average Current Logic Supply
I DDQ 10
10
10
µA Quiescent Current Data Out Source Current I SOR 0.450.450.700.40mA V OUT = V DD - 0.7V Data Out Sink Current I SINK 0.45
0.45
0.70
0.40
mA
V OUT = 0.7V
Logic Input Capacitance
C IN
10
10
10pF
0°C +25°C +70°C Characteristics
Sym
Units Test Conditions min max
min
typ*max min max
50KHz Output Switching Frequency with no load
*Typical values only for HV232脉动测速
AC Characteristics (over operating conditions V DD = 5V, unless otherwise noted)
0°C +25°C
+70°C
Characteristics
Sym min max
min typ*
max
min max
Units Test Condi tions
Set Up Time Before LE Rises t SD 150150150ns Time Width of LE
t WLE 150150
150ns
Clock Delay Time to Data Out t DO 55150
60150
70150ns Time Width of CL
t WCL 150150150ns Set Up Time Data to Clock t SU 15158.0
20ns Hold Time Data from Clock t h 35
35
35
ns
Clock Freq
f CLK 5.0 5.0 5.0MHz 50% duty cycle f DATA = f CLK /2Clock Rise and Fall Times t r , t f 1.0 1.0 1.0µs Turn On Time t ON 5.0 5.0 5.0µs V SIG = V PP -10V,R L = 10K ΩTurn Off Time
t OFF
5.0 5.0 5.0µs
V SIG = V PP -10V,R L = 10K Ω20
2020V PP = 160V,V NN = -40V
Maximum V SIG Slew Rate
dv/dt
202020V/ns
V PP = 100V,V NN = -100V 20
20
20
V PP = 40V,V NN = -160V
Off Isolation
KO
-30-30-33
-30dB f = 5MHz,
1K Ω//15pF load -58
-58-58dB f = 5MHz,50Ω load Switch Crosstalk K CR -60
-
60
-70
-60
dB
f = 5MHz,50Ω load Output Switch Isolation I ID 300
300
300mA 300ns pulse width,Diode Current
2.0% duty cycle Off Capacitance SW to GND C SG(OFF) 5.017 5.01217 5.017pF 0V, 1MHz On Capacitance SW to GND
C SG(ON)
25
50
25
38
50
25
50
pF
0V, 1MHz
AC Characteristics (over operating conditions V DD = 5V, unless otherwise noted)
V PP = 40V, V NN = -160V, R L = 50ΩV PP = 100V, V NN = -100V, R L = 50ΩV PP = 160V, V NN = -40V, R L = 50Ω
150150150150150150
mV
Output Voltage Spike
+25°C Units
Characteristics Sym Test Conditions
min typ* max
+V SPK
-V SPK +V SPK -V SPK +V SPK -V SPK
*Typical values only for HV232
Electrical Characteristics
*Typical values only for HV232
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