AT24C08A-10PE-2.7中文资料

元器件交易网tures•Write Protect Pin for Hardware Data Protection

–Utilizes Different Array Protection Compared to the AT24C02/04/08/16•Medium-voltage and Standard-voltage Operation–5.0 (VCC = 4.5V to 5.5V)–2.7 (V•CC = 2.7V to 5.5V)Internally Organized 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K)•Two-wire Serial Interface•Schmitt Trigger, Filtered Inputs for Noise Suppression•Bidirectional Data Transfer Protocol•400 kHz (2.7V, 5V) Clock Rate•8-byte Page (2K), 16-byte Page (4K, 8K, 16K) Write Modes

•Partial Page Writes Allowed•Self-timed Write Cycle (5 ms Max)•High Reliability–Endurance: One Million Write Cycles–Data Retention: 100 Years•Automotive Grade, Extended Temperature, and Lead-Free/Halogen-FreeDevices Available•8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP PackagesDescriptionThe AT24C02A/04A/08A/16A provides 2048/4096/8192/16384 bits of serial electri-cally erasable and programmable read-only memory (EEPROM) organized as256/512/1024/2048 words of 8 bits each. The device is optimized for use in manyautomotive applications where low-power and low-voltage operation are AT24C02A/04A/08A/16A is available in space-saving 8-lead PDIP, 8-lead JEDECSOIC, and 8-lead TSSOP packages and is accessed via a two-wire serial interface. Inaddition, the entire family is available in 2.7V (2.7V to 5.5V) 1. Pin Configurations8-lead PDIPPin NameFunctionA018VCCA0–A2Address InputsA127WPSDASerial DataA236SCLGND45SDASCLSerial Clock InputWPWrite ProtectNCNo-connect8-lead SOICA018VCCA127WPA236SCLGND45SDA8-lead TSSOPA018VCCA127WPA236SCLGND45SDATwo-wire SerialEEPROMExtendedTemperature2K (256 x 8)4K (512 x 8)8K (1024 x 8)16K (2048 x 8)AT24C02AAT24C04AAT24C08AAT24C16A5083A–SEEPR–9/041

元器件交易网olute Maximum Ratings*−40°C to +125°−65°C to +150°CVoltage on Any Pinwith Respect −1.0V to +7.0VMaximum 6.25VDC 5.0 mA*NOTICE:Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect device

1. Block DiagramSTARTSTOPLOGICPin DescriptionSERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into eachEEPROM device and negative edge clock data out of each DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin isopen-drain driven and may be wire-ORed with any number of other open-drain or open-collector /PAGE ADDRESSES (A2, A1, A0): The A2, A1, and A0 pins are deviceaddress inputs that must be hardwired for the AT24C02A. As many as eight 2K devicesmay be addressed on a single bus system. (Device addressing is discussed in detailunder

Device Addressing, page 9).The AT24C04A uses the A2 and A1 inputs for hardwire addressing, and a total of four4K devices may be addressed on a single bus system. The A0 pin is a no-connect.2AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16AThe AT24C08A only uses the A2 input for hardwire addressing, and a total of two 8Kdevices may be addressed on a single bus system. The A0 and A1 pins are AT24C16A does not use the device address pins, which limits the number ofdevices on a single bus to one. The A0, A1, and A2 pins are PROTECT (WP): The AT24C02A/04A/08A/16A have a WP pin that provideshardware data protection. The WP pin allows normal read/write operations when con-nected to ground (GND). When the WP pin is connected to VCC, the write protectionfeature is enabled and operates as shown. (See Table 1.)Table 1. Write ProtectPart of the Array ProtectedWP Pin StatusAt VCCAt GND24C02AUpper Half

(1K) Array24C04AUpper Half

(2K) Array24C08AFull (8K)

Array24C16AFull (16K)ArrayNormal Read/Write OperationsMemory OrganizationAT24C02A, 2K SERIAL EEPROM: The 2K is internally organized with 32 pages of 8bytes each. Random word addressing requires an 8-bit data word 24C04A, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16bytes each. Random word addressing requires a 9-bit data word 24C08A, 8K SERIAL EEPROM: The 8K is internally organized with 64 pages of 16bytes each. Random word addressing requires a 10-bit data word 24C16A, 16K SERIAL EEPROM: The 16K is internally organized with 128 pages of16 bytes each. Random word addressing requires an 11-bit data word 2. Pin CapacitanceApplicable over recommended operating range from TA = 25°C, f = 1.0 MHz, Vcc= +2.7VSymbolCI/OCINNote:Test ConditionInput/Output Capacitance (SDA)Input Capacitance (A0, A1, A2, SCL)This parameter is characterized and is not 100% 86UnitspFpFConditionsVI/O = 0VVIN = 0V35083A–SEEPR–9/04

元器件交易网le 3. DC CharacteristicsApplicable over recommended operating range from: TAE = −40°C to +125°C, VCC = +2.7V to +5.5V(unless otherwise noted)SymbolVCC3ICCICCISB3ISB4ILIILOVILVIHVOL2VOL1Note:ParameterSupply VoltageSupply Current VCC = 5.0VSupply Current VCC = 5.0VStandby Current VCC = 2.7VStandby Current VCC = 5.0VInput Leakage CurrentOutput Leakage CurrentInput Low Level (1)Input High Level (1)Output Low Level VCC = 3.0VOutput Low Level VCC = 1.8VIOL = 2.1 mAIOL = 0.15 mAREAD at 100 kHzWRITE at 100 kHzVIN = VCC or VSSVIN = VCC or VSSVIN = VCC or VSSVOUT = VCC

or VSS−0.6VCC x 0.7Test ConditionMin2.70.42.01.68.00.100.05TypMax5.51.03.04.018.03.03.0VCC x 0.3VCC + 0.50.40.2UnitsVmAmAµAµAµAµ min and VIH max are reference only and are not tested.4AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16ATable 4. AC CharacteristicsApplicable over recommended operating range from TAE

= −40°C to +125°C, VCC = +2.7V to +5.5V, CL = 1 TTL Gate and100 pF (unless otherwise noted).AT24C02A/04A/08A/tWREndurance(2)Note:ParameterClock Frequency, SCLClock Pulse Width LowClock Pulse Width HighNoise Suppression Time(1)Clock Low to Data Out ValidTime the bus must be free before

a new transmission can start(2)Start Hold TimeStart Set-up TimeData In Hold TimeData In Set-up TimeInputs Rise Time(2)Inputs Fall Time(2)Stop Set-up TimeData Out Hold TimeWrite Cycle Time5.0V, 25°C, Page Mode1M0.65050.11.20.60.6.20.6500.9MinMax400UnitskHzµsµsnsµsµsµsµsµsnsnsnsµsnsmsWrite parameter is characterized and is not 100% tested (TA = 25°C). parameter is characterized and is not 100% tested.

55083A–SEEPR–9/04

元器件交易网ice OperationCLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-nal device. Data on the SDA pin may change only during SCL low time periods (seeFigure 2). Data changes during SCL high periods will indicate a start or stop condition asdefined in Figure 2. Data ValiditySTART CONDITION: A high-to-low transition of SDA with SCL high is a start conditionthat must precede any other command (see Figure 3).Figure 3. Start and Stop DefinitionSTOP CONDITION: A low-to-high transition of SDA with SCL high is a stop a read sequence, the stop command will place the EEPROM in a standby powermode (see Figure 3).ACKNOWLEDGE: All addresses and data words are serially transmitted to and fromthe EEPROM in 8-bit words.

The

EEPROM sends a “0” to acknowledge that it hasreceived each word. This happens during the ninth clock Y MODE: The AT24C02A/04A/08A/16A features a low-power standby modethat is enabled (a) upon power-up and (b) after the receipt of the STOP bit and the com-pletion of any internal operations.6AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16AMEMORY RESET: After an interruption in protocol, power loss or system reset, anytwo-wire part can be reset by following these steps:

up to 9 for SDA high in each cycle while SCL is a start condition as SDA is 4. Bus TimingFigure 5. Write Cycle TimingSCLSDA8th BITWORDnACKtwrSTOPCONDITIONNote:(1)STARTCONDITIONThe write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the interval clear/write cycle.75083A–SEEPR–9/04

元器件交易网ure 6. Output Acknowledge8AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16ADevice AddressingThe 2K, 4K, and 8K EEPROM devices all require an 8-bit device address word followinga start condition to enable the chip for a read or write operation, as shown in Figure 7. Device Address

2K1MSB4K1010010A2A1A0R/WLSBA2A1P0R/WA2P1P0R/WP2P1P0R/W8K16K11001100The device address word consists of a mandatory “1”, “0” sequence for the first fourmost significant bits as shown. This is common to all the EEPROM next three bits are the A2, A1, and A0 device address bits for the 2K three bits must compare to their corresponding hardwired input 4K EEPROM only uses the A2 and A1 device address bits with the third bit being amemory page address bit. The two device address bits must compare to their corre-sponding hardwired input pins. The A0 pin is 8K EEPROM only uses the A2 device address bit with the next two bits being formemory page addressing. The A2 bit must compare to its corresponding hardwiredinput pin. The A1 and A0 pins are 16K EEPROM does not use the device address pins, which limits the number ofdevices on a single bus to one. The A0, A1, and A2 pins are eighth bit of the device address is the read/write operation select bit. A read opera-tion is initiated if this bit is high, and a write operation is initiated if this bit is a compare of the device address, the EEPROM will output a “0”. If a compare isnot made, the chip will return to a standby OperationsBYTE WRITE: A write operation requires an 8-bit data word address following thedevice address word and acknowledgement. Upon receipt of this address, the EEPROMwill again respond with a “0” and then clock in the first 8-bit data word. Following receiptof the 8-bit data word, the EEPROM will output a “0” and the addressing device, such asa microcontroller, must terminate the write sequence with a stop condition. At this time,the

EEPROM enters an internally-timed write cycle, tWR, to the nonvolatile memory. Allinputs are disabled during this write cycle, and the EEPROM will not respond until thewrite is complete, as shown in Figure 8.95083A–SEEPR–9/04

元器件交易网ure 8. Byte WriteSTARTSDA LINEMSBLRAS/CBWKMSBLSBACKACKWRITESTOPDEVICEADDRESSWORD ADDRESSDATAPAGE WRITE: The 2K EEPROM is capable of an 8-byte page write, and the 4K, 8K,and 16K devices are capable of 16-byte page writes.A page write is initiated the same as a byte write, but the microcontroller does not senda stop condition after the first data word is clocked in. Instead, after the EEPROMacknowledges receipt of the first data word, the microcontroller can transmit up to seven(2K) or fifteen (4K, 8K, 16K) more data words. The EEPROM will respond with a “0”after each data word received. The microcontroller must terminate the page writesequence with a stop condition, as shown in Figure 9. Page WriteSTARTSDA LINEMSBLRAS/CBWKACKACKACKACKWRITEWORD ADDRESS (n)STOPDEVICEADDRESSDATA (n)DATA (n + 1) DATA (n + x)The data word address lower three (2K) or four (4K, 8K, 16K) bits are internally incre-mented following the receipt of each data word. The higher data word address bits arenot incremented, retaining the memory page row location. When the word address,internally generated, reaches the page boundary, the following byte is placed at thebeginning of the same page. If more than eight (2K) or sixteen (4K, 8K, 16K) data wordsare transmitted to the EEPROM, the data word address will “roll over” and previous datawill be LEDGE POLLING: Once the internally-timed write cycle has started and theEEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-ing a start condition followed by the device address word. The read/write bit isrepresentative of the operation desired. Only if the internal write cycle has completedwill the EEPROM respond with a “0” allowing the read or write sequence to continue.10AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16ARead OperationsRead operations are initiated the same way as write operations with the exception thatthe read/write select bit in the device address word is set to “1”. There are three readoperations: current address read, random address read and sequential T ADDRESS READ: The internal data word address counter maintains thelast address accessed during the last read or write operation, incremented by one. Thisaddress stays valid between operations as long as the chip power is maintained. Theaddress “roll over” during read is from the last byte of the last memory page to the firstbyte of the first page. The address “roll over” during write is from the last byte of the cur-rent page to the first byte of the same the device address with the read/write select bit set to “1” is clocked in andacknowledged by the EEPROM, the current address data word is serially clocked microcontroller does not respond with an input “0” but does generate a followingstop condition, as shown in Figure 10. Current Address ReadSTARTSDA LINEMSBLRAS/CBWKDATANOACKREADSTOPDEVICEADDRESSRANDOM READ: A random read requires a “dummy” byte write sequence to load in thedata word address. Once the device address word and data word address are clockedin and acknowledged by the EEPROM, the microcontroller must generate another startcondition. The microcontroller now initiates a current address read by sending a deviceaddress with the read/write select bit high. The EEPROM acknowledges the deviceaddress and serially clocks out the data word. The microcontroller does not respondwith a “0” but does generate a following stop condition, as shown in Figure 11. Random ReadSTARTSDA LINEMSBLRAS/CBWKMSBLASCBKMSBLSBACKDATA nNOACKWRITESTARTDEVICEADDRESSREADSTOPDEVICEADDRESSWORDADDRESS nDUMMY WRITESEQUENTIAL READ: Sequential reads are initiated by either a current address read ora random address read. After the microcontroller receives a data word, it responds withan acknowledge. As long as the EEPROM receives an acknowledge, it will continue toincrement the data word address and serially clock out sequential data words. When thememory address limit is reached, the data word address will “roll over” and the sequen-tial read will continue. The sequential read operation is terminated when the115083A–SEEPR–9/04

元器件交易网rocontroller does not respond with a “0” but does generate a following stop condition,as shown in Figure 12. Sequential Read12AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16AAT24C02A Ordering InformationOrdering CodeAT24C02A-10PE-2.7AT24C02AN-10SE-2.7AT24C02A-10PQ-2.7AT24C02AN-10SQ-2.7AT24C02A-10TQ-2.7Note:Package8P38S18P38S18A2Operation RangeExtended Temperature(−40°C to 125°C)Lead-free/Halogen-free/Extended Temperature(−40°C to 125°C)For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables(Table 3 on page 4 and Table 4 on page 5).Package Type8P38S18A28-pin, 0.300” Wide, Plastic Dual Inline Package (PDIP)8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)Options−2.7Low Voltage (2.7V to 5.5V)135083A–SEEPR–9/04

元器件交易网24C04A Ordering InformationOrdering CodeAT24C04A-10PE-2.7AT24C04AN-10SE-2.7AT24C04A-10TE-2.7AT24C04A-10PQ-2.7AT24C04A-10TQ-2.7AT24C04AN-10SQ-2.7Note:Package8P38S18A28P38A28S1Operation RangeExtended Temperature(−40°C to 125°C)Lead-free/Halogen-freeExtended Temperature(−40°C to 125°C)For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables(Table 3 on page 4 and Table 4 on page 5).Package Type8P38S18A28-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP)8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)Options−2.7Low Voltage (2.7V to 5.5V)14AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16AAT24C08A Ordering InformationOrdering CodeAT24C08A-10PE-2.7AT24C08AN-10SE-2.7AT24C08A-10PQ-2.7AT24C08AN-10SQ-2.7AT24C08AN-10TQ-2.7Note:Package8P38S18P38S18A2Operation RangeExtended Temperature(−40°C to 125°C)Lead-free/Halogen-free/Extended Temperature(−40°C to 125°C)For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables(Table 3 on page 4 and Table 4 on page 5).

Package Type8P38S18A28-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP)8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)Options−2.7Low Voltage (2.7V to 5.5V)155083A–SEEPR–9/04

元器件交易网24C16A Ordering InformationOrdering CodeAT24C16A-10PE-2.7AT24C16AN-10SE-2.7AT24C16A-10PQ-2.7AT24C16AN-10SQ-2.7AT24C16A-10TQ-2.7Note:Package8P38S18P38S18A2Operation RangeExtended Temperature(−40°C to 125°C)Lead-free/Halogen-freeExtended Temperature(−40°C to 125°C)For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table(Table 3 on page 4 and Table 4 on page 5).

Package Type8P38S18A28-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP)8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)Options−2.7Low Voltage (2.7V to 5.5V)16AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16APackaging Information8P3 – PDIPEE11NTop ViewceAEnd ViewCOMMON DIMENSIONS(Unit of Measure = inches)DD1eA2ASYMBOLMIN–

NOMMAXNOTEA

– 0.210 2A2 0.115 0.130 0.195

b 0.014 0.018 0.022 5b2 0.045 0.060 0.070 6b3 0.030 0.039 0.045 6c 0.008 0.010 0.014D 0.355 0.365 0.400 3b2b34 PLCSLD1 0.005

–

– 334bE 0.300 0.310 0.325 4E1 0.240 0.250 0.280

e 0.100 BSCeA 0.300 BSC

L 0.115 0.130 0.150 2Side ViewNotes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. 6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).01/09/022325 Orchard ParkwaySan Jose, CA 95131TITLE8P3, 8-lead, 0.300" Wide Body, Plastic Dual

In-line Package (PDIP)DRAWING NO.8P3REV.

BR175083A–SEEPR–9/04

元器件交易网8S1 – JEDEC SOIC

C1EE1N∅LTop ViewEnd VieweBASYMBOLCOMMON DIMENSIONS(Unit of Measure = mm)MIN0.10

NOM–

MAX0.25

NOTE

A1 A

A1

1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25

D D

E1

4.80 – 5.00

3.81 – 3.99

5.79

0.40

–

1.27 BSC– 1.276.20Side View E

e

L

∅ 0° – 8°Note:

These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.10/7/031150 E. Cheyenne Mtn. do Springs, CO 80906TITLE8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing

Small Outline (JEDEC SOIC)DRAWING .

8S1 BR18AT24C02A/04A/08A/16A5083A–SEEPR–9/04

元器件交易网24C02A/04A/08A/16A8A2 – TSSOP321Pin 1 indicatorthis cornerE1EL1NLTop ViewEnd ViewCOMMON DIMENSIONS(Unit of Measure = mm)SYMBOLMINNOMMAXNOTEbAD 2.90 3.00 3.10 2, 5E 6.40 BSC

E1 4.30 4.40 4.50 3, 5A – – 1.20eDA2A2 0.80 1.00 1.05be

0.19

0.45

–

0.65 BSC0.60 0.750.30 4Side ViewL

L1 1.00 REFNotes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances,

datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed

0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm

(0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the

b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between

protrusion and adjacent lead is 0.07 mm.

5. Dimension D and E1 to be determined at Datum Plane H.5/30/02R2325 Orchard ParkwaySan Jose, CA 95131TITLE8A2, 8-lead, 4.4 mm Body, Plastic

Thin Shrink Small Outline Package (TSSOP)DRAWING NO.8A2REV.

B195083A–SEEPR–9/04

元器件交易网el Corporation2325 Orchard ParkwaySan Jose, CA 95131, USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel OperationsMemory2325 Orchard ParkwaySan Jose, CA 95131, USATel: 1(408) 441-0311Fax: 1(408) 436-4314RF/AutomotiveTheresienstrasse 2Postfach 353574025 Heilbronn, GermanyTel: (49) 71-31-67-0Fax: (49) 71-31-67-23401150 East Cheyenne Mtn. do Springs, CO 80906, USATel: 1(719) 576-3300Fax: 1(719) 540-1759Regional HeadquartersEuropeAtmel SarlRoute des Arsenaux 41Case Postale 80CH-1705 FribourgSwitzerlandTel: (41) 26-426-5555Fax: (41) 26-426-5500Microcontrollers2325 Orchard ParkwaySan Jose, CA 95131, USATel: 1(408) 441-0311Fax: 1(408) 436-4314La ChantrerieBP 7060244306 Nantes Cedex 3, FranceTel: (33) 2-40-18-18-18Fax: (33) 2-40-18-19-60Biometrics/Imaging/Hi-Rel MPU/High Speed Converters/RF DatacomAvenue de RochepleineBP 12338521 Saint-Egreve Cedex, FranceTel: (33) 4-76-58-30-00Fax: (33) 4-76-58-34-80AsiaRoom 1219Chinachem Golden Plaza77 Mody Road TsimshatsuiEast KowloonHong KongTel: (852) 2721-9778Fax: (852) 2722-1369ASIC/ASSP/Smart CardsZone Industrielle13106 Rousset Cedex, FranceTel: (33) 4-42-53-60-00Fax: (33) 4-42-53-60-011150 East Cheyenne Mtn. do Springs, CO 80906, USATel: 1(719) 576-3300Fax: 1(719) 540-1759Scottish Enterprise Technology ParkMaxwell BuildingEast Kilbride G75 0QR, Scotland

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© Atmel Corporation 2004. All rights reserved. Atmel®, logo and combinations thereof are registered trademarks and Everywhere You AreSMis a trademark of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper.5083A–SEEPR–9/04